From: Bhargav Joshi <j.bhargav.u@gmail.com>
To: Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Nishanth Menon <nm@ti.com>,
Santosh Shilimkar <ssantosh@kernel.org>
Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, goledhruva@gmail.com,
m-chawdhry@ti.com, daniel.baluta@gmail.com,
simona.toaca@nxp.com, j.bhargav.u@gmail.com
Subject: [PATCH 2/2] dt-bindings: spi: ti,davinci-spi: convert to DT schema
Date: Sun, 16 Aug 2026 03:19:32 +0530 [thread overview]
Message-ID: <20260816-ti-davinci-spi-v1-2-a7f57dfd5262@gmail.com> (raw)
In-Reply-To: <20260816-ti-davinci-spi-v1-0-a7f57dfd5262@gmail.com>
Convert the TI DaVinci/Keystone SPI controller binding from text format
to DT schema.
Changes during the conversion:
- Create a separate ti,davinci-spi-peripheral-props.yaml schema to
properly define the ti,spi-wdelay peripheral property.
- Add missing dmas and dma-names properties.
- Add constraints to ti,spi-wdelay based on the 6-bit width
of the SPIFMTn.WDELAY hardware register field.
- Add constraints to num-cs based on the maximum hardware chip
selects available on the DA850 SoC.
Signed-off-by: Bhargav Joshi <j.bhargav.u@gmail.com>
---
.../devicetree/bindings/spi/spi-davinci.txt | 100 -----------------
.../bindings/spi/spi-peripheral-props.yaml | 1 +
.../spi/ti,davinci-spi-peripheral-props.yaml | 25 +++++
.../devicetree/bindings/spi/ti,davinci-spi.yaml | 118 +++++++++++++++++++++
4 files changed, 144 insertions(+), 100 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt
deleted file mode 100644
index f012888656ec..000000000000
--- a/Documentation/devicetree/bindings/spi/spi-davinci.txt
+++ /dev/null
@@ -1,100 +0,0 @@
-Davinci SPI controller device bindings
-
-Links on DM:
-Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
-dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
-OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
-
-Required properties:
-- #address-cells: number of cells required to define a chip select
- address on the SPI bus. Should be set to 1.
-- #size-cells: should be zero.
-- compatible:
- - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
- - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
- - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC
- family
-- reg: Offset and length of SPI controller register space
-- num-cs: Number of chip selects. This includes internal as well as
- GPIO chip selects.
-- ti,davinci-spi-intr-line: interrupt line used to connect the SPI
- IP to the interrupt controller within the SoC. Possible values
- are 0 and 1. Manual says one of the two possible interrupt
- lines can be tied to the interrupt controller. Set this
- based on a specific SoC configuration.
-- interrupts: interrupt number mapped to CPU.
-- clocks: spi clk phandle
- For 66AK2G this property should be set per binding,
- Documentation/devicetree/bindings/clock/ti,sci-clk.yaml
-
-SoC-specific Required Properties:
-
-The following are mandatory properties for Keystone 2 66AK2G SoCs only:
-
-- power-domains: Should contain a phandle to a PM domain provider node
- and an args specifier containing the SPI device id
- value. This property is as per the binding,
-
-Optional:
-- cs-gpios: gpio chip selects
- For example to have 3 internal CS and 2 GPIO CS, user could define
- cs-gpios = <0>, <0>, <0>, <&gpio1 30 0>, <&gpio1 31 0>;
- where first three are internal CS and last two are GPIO CS.
-
-Optional properties for slave devices:
-SPI slave nodes can contain the following properties.
-Not all SPI Peripherals from Texas Instruments support this.
-Please check SPI peripheral documentation for a device before using these.
-
-- ti,spi-wdelay : delay between transmission of words
- (SPIFMTn.WDELAY, SPIDAT1.WDEL) must be specified in number of SPI module
- clock periods.
-
- delay = WDELAY * SPI_module_clock_period + 2 * SPI_module_clock_period
-
-Below is timing diagram which shows functional meaning of
-"ti,spi-wdelay" parameter.
-
- +-+ +-+ +-+ +-+ +-+ +-+ +-+ +-+
-SPI_CLK | | | | | | | | | | | | | | | |
- +----------+ +-+ +-+ +-+ +-+ +---------------------------+ +-+ +-+ +-
-
-SPI_SOMI/SIMO+-----------------+ +-----------
- +----------+ word1 +---------------------------+word2
- +-----------------+ +-----------
- WDELAY
- <-------------------------->
-
-Example of a NOR flash slave device (n25q032) connected to DaVinci
-SPI controller device over the SPI bus.
-
-spi0:spi@20bf0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "ti,dm6446-spi";
- reg = <0x20BF0000 0x1000>;
- num-cs = <4>;
- ti,davinci-spi-intr-line = <0>;
- interrupts = <338>;
- clocks = <&clkspi>;
-
- flash: flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "st,m25p32";
- spi-max-frequency = <25000000>;
- reg = <0>;
- ti,spi-wdelay = <8>;
-
- partition@0 {
- label = "u-boot-spl";
- reg = <0x0 0x80000>;
- read-only;
- };
-
- partition@1 {
- label = "test";
- reg = <0x80000 0x380000>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
index 880a9f624566..cb5d608998e1 100644
--- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
@@ -155,5 +155,6 @@ allOf:
- $ref: fsl,dspi-peripheral-props.yaml#
- $ref: samsung,spi-peripheral-props.yaml#
- $ref: nvidia,tegra210-quad-peripheral-props.yaml#
+ - $ref: ti,davinci-spi-peripheral-props.yaml#
additionalProperties: true
diff --git a/Documentation/devicetree/bindings/spi/ti,davinci-spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/ti,davinci-spi-peripheral-props.yaml
new file mode 100644
index 000000000000..1060f176c6cb
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/ti,davinci-spi-peripheral-props.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/ti,davinci-spi-peripheral-props.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI DaVinci/Keystone SPI Peripheral Properties
+
+maintainers:
+ - Bartosz Golaszewski <brgl@kernel.org>
+
+description:
+ Peripheral-specific properties for SPI devices attached to a TI
+ DaVinci/Keystone SPI controller.
+
+properties:
+ ti,spi-wdelay:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 63
+ description:
+ delay between transmission of words (SPIFMTn.WDELAY, SPIDAT1.WDEL)
+ must be specified in number of SPI module clock periods.
+
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/spi/ti,davinci-spi.yaml b/Documentation/devicetree/bindings/spi/ti,davinci-spi.yaml
new file mode 100644
index 000000000000..81014e963909
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/ti,davinci-spi.yaml
@@ -0,0 +1,118 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/ti,davinci-spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI DaVinci/Keystone SPI Controller
+
+maintainers:
+ - Bartosz Golaszewski <brgl@kernel.org>
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - ti,da830-spi
+ - ti,keystone-spi
+ - items:
+ - const: ti,keystone-spi
+ - const: ti,dm6441-spi
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+ description:
+ Should contain a phandle to a PM domain provider node
+ and an args specifier containing the SPI device id
+ value.
+
+ num-cs:
+ minimum: 1
+ maximum: 6
+ default: 1
+ description:
+ Number of chip selects supported by the controller. This
+ includes both internal and GPIO chip selects.
+
+ ti,davinci-spi-intr-line:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1]
+ description:
+ Interrupt line used to connect the SPI IP to the interrupt
+ controller within the SoC. The SPI peripheral can route its
+ interrupt output to one of two lines (INT0 or INT1). Set
+ this based on the SoC-specific wiring to the interrupt
+ controller.
+
+ dmas:
+ items:
+ - description: RX DMA channel
+ - description: TX DMA channel
+
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - ti,davinci-spi-intr-line
+
+allOf:
+ - $ref: spi-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ const: ti,keystone-spi
+ then:
+ required:
+ - power-domains
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ spi@20bf0000 {
+ compatible = "ti,keystone-spi","ti,dm6441-spi";
+ reg = <0x20bf0000 0x1000>;
+ num-cs = <4>;
+ ti,davinci-spi-intr-line = <0>;
+ interrupts = <338>;
+ clocks = <&clkspi>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <25000000>;
+ reg = <0>;
+ ti,spi-wdelay = <8>;
+ };
+ };
+
+ - |
+ spi@41000 {
+ compatible = "ti,da830-spi";
+ reg = <0x41000 0x1000>;
+ num-cs = <6>;
+ ti,davinci-spi-intr-line = <1>;
+ interrupts = <20>;
+ dmas = <&edma0 14 0>, <&edma0 15 0>;
+ dma-names = "rx", "tx";
+ clocks = <&psc0 4>;
+ power-domains = <&psc0 4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
--
2.55.0
next prev parent reply other threads:[~2026-08-15 21:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-15 21:49 [PATCH 0/2] spi: davinci: Convert bindings to dt-schema and clean up DTS Bhargav Joshi
2026-08-15 21:49 ` [PATCH 1/2] ARM: dts: ti: keystone-k2l: Remove obsolete ti,davinci-spi-num-cs property Bhargav Joshi
2026-08-15 21:57 ` sashiko-bot
2026-08-15 21:49 ` Bhargav Joshi [this message]
2026-08-15 21:58 ` [PATCH 2/2] dt-bindings: spi: ti,davinci-spi: convert to DT schema sashiko-bot
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