From: "Grégoire Layet" <gregoire.layet@9elements.com>
To: "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Lubomir Rintel" <lkundrak@v3.sk>,
devicetree@vger.kernel.org, "Joel Stanley" <joel@jms.id.au>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Lee Jones" <lee@kernel.org>,
"Grégoire Layet" <git@gregoirelayet.com>,
"Tan Siewert" <tan.siewert@9elements.com>
Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, mfd@lists.linux.dev,
andrew@lunn.ch, jacky_chou@aspeedtech.com,
yh_chung@aspeedtech.com, ninad@linux.ibm.com,
anirudhsriniv@gmail.com,
"Grégoire Layet" <gregoire.layet@9elements.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski@oss.qualcomm.com>
Subject: [PATCH v6 1/6] dt-bindings: serial: 8250: aspeed: add ast2600 and aspeed,vuart-over-pci
Date: Tue, 18 Aug 2026 10:29:14 +0000 [thread overview]
Message-ID: <20260818-aspeed-driver-v6-v6-1-fd7cc0b338ea@9elements.com> (raw)
In-Reply-To: <20260818-aspeed-driver-v6-v6-0-fd7cc0b338ea@9elements.com>
The ASPEED AST2600 can be used as a PCI device.
The ASPEED AST2600 has 2 Virtual UARTs accessible over PCI.
2 Virtual UART can be exposed to the host via this PCI device.
These are 8250-compatible register sets and can be used to have UART
communication between the PCI BMC and the host.
This boolean can be set to specify if a VUART is used over PCI. A VUART
over PCI needs access to the SCU syscon to set the enable bits of the
PCI device.
On the aspeed's chips, the clocks phandle already points at the SCU node.
But deriving the regmap from the clock provider would misuse the clocks
binding. An explicit scu-syscon phandle states the dependency directly.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Grégoire Layet <gregoire.layet@9elements.com>
---
Documentation/devicetree/bindings/serial/8250.yaml | 42 ++++++++++++++++++++--
1 file changed, 40 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml
index bb7b9c87a807..8dd4b7af0c0d 100644
--- a/Documentation/devicetree/bindings/serial/8250.yaml
+++ b/Documentation/devicetree/bindings/serial/8250.yaml
@@ -18,12 +18,34 @@ allOf:
- aspeed,lpc-io-reg
- required:
- aspeed,lpc-interrupts
+ then:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - aspeed,ast2500-vuart
+ - aspeed,ast2600-vuart
+ - if:
+ anyOf:
- required:
- aspeed,sirq-polarity-sense
then:
properties:
compatible:
const: aspeed,ast2500-vuart
+ - if:
+ required:
+ - aspeed,vuart-over-pci
+ then:
+ required:
+ - aspeed,scu-syscon
+ properties:
+ compatible:
+ contains:
+ const: aspeed,ast2600-vuart
+ else:
+ properties:
+ aspeed,scu-syscon: false
- if:
properties:
compatible:
@@ -106,6 +128,9 @@ properties:
- const: ns16850
- const: aspeed,ast2400-vuart
- const: aspeed,ast2500-vuart
+ - items:
+ - const: aspeed,ast2600-vuart
+ - const: aspeed,ast2500-vuart
- const: intel,xscale-uart
- const: mrvl,pxa-uart
- const: nuvoton,wpcm450-uart
@@ -297,7 +322,8 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32-array
maxItems: 1
description: |
- The VUART LPC address. Only applicable to aspeed,ast2500-vuart.
+ The VUART LPC address. Only applicable to aspeed,ast2500-vuart and
+ aspeed,ast2600-vuart.
aspeed,lpc-interrupts:
$ref: /schemas/types.yaml#/definitions/uint32-array
@@ -306,7 +332,19 @@ properties:
description: |
A 2-cell property describing the VUART SIRQ number and SIRQ
polarity (IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_LEVEL_HIGH). Only
- applicable to aspeed,ast2500-vuart.
+ applicable to aspeed,ast2500-vuart and aspeed,ast2600-vuart.
+
+ aspeed,vuart-over-pci:
+ type: boolean
+ description:
+ Enable the VUART over the BMC PCI device. Only applicable to
+ aspeed,ast2600-vuart.
+
+ aspeed,scu-syscon:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to the SCU syscon, used to enable the VUART over the BMC PCI
+ device. Only applicable to aspeed,ast2600-vuart.
required:
- reg
--
2.54.0
next prev parent reply other threads:[~2026-08-18 10:31 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-18 10:29 [PATCH v6 0/6] soc: aspeed: Add BMC and host driver for PCIe BMC device Grégoire Layet
2026-08-18 10:29 ` Grégoire Layet [this message]
2026-08-18 10:41 ` [PATCH v6 1/6] dt-bindings: serial: 8250: aspeed: add ast2600 and aspeed,vuart-over-pci sashiko-bot
2026-08-18 10:29 ` [PATCH v6 2/6] serial: 8250_aspeed_vuart: add aspeed,ast2600-vuart compatible string Grégoire Layet
2026-08-18 10:43 ` sashiko-bot
2026-08-18 10:29 ` [PATCH v6 3/6] serial: 8250_aspeed_vuart: add VUART over PCI Grégoire Layet
2026-08-18 10:40 ` sashiko-bot
2026-08-18 10:29 ` [PATCH v6 4/6] mfd: aspeed-pci-core: add AST2600 PCIe BMC device driver Grégoire Layet
2026-08-18 10:40 ` sashiko-bot
2026-08-18 10:29 ` [PATCH v6 5/6] ARM: dts: aspeed: g6: Change vuart compatible string for ast2600 Grégoire Layet
2026-08-18 10:39 ` sashiko-bot
2026-08-18 10:29 ` [PATCH v6 6/6] ARM: dts: aspeed: g6: add aspeed,vuart-over-pci prop to vuart3 and 4 Grégoire Layet
2026-08-18 10:46 ` sashiko-bot
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