Re: [PATCH 1/3] dt-bindings: i3c: xlnx: Add IBI and hot-join capability properties

[Conor Dooley <conor@kernel.org>]

[-- Attachment #1: Type: text/plain, Size: 2395 bytes --]

On Tue, Aug 18, 2026 at 08:36:16PM +0200, Krzysztof Kozlowski wrote:
> On 18/08/2026 14:02, Patil, Shubham Sanjay wrote:
> > Hi Krzysztof,
> > 
> > On 8/17/2026 2:20 PM, Krzysztof Kozlowski wrote:
> >> [You don't often get email from krzk@kernel.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
> >>
> >> Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.
> >>
> >>
> >> On Fri, Aug 14, 2026 at 05:21:53PM +0530, Shubham Patil wrote:
> >>> In-Band Interrupt and Hot-Join are synthesis-time options of the AXI I3C
> >>> IP. Describe them with two boolean properties.
> >>>
> >>> A Hot-Join request is acknowledged by the IBI machinery, so a hot-join
> >>> capable design is always IBI capable as well. Both events are reported
> >>> through the controller interrupt, which is therefore required whenever
> >>> the capability is present.
> >>>
> >>> Signed-off-by: Shubham Patil <shubhamsanjay.patil@amd.com>
> >>> ---
> >>>   .../bindings/i3c/xlnx,axi-i3c-1.0.yaml        | 23 +++++++++++++++++++
> >>>   1 file changed, 23 insertions(+)
> >>>
> >>
> >> So the same SoC using this core will have different synthesis options?
> >> IOW, why isn't this implied by a specific compatible?
> > 
> > Yes. This core is not part of the SoC's fixed hardware: it is a design
> > compiled into the FPGA fabric. When the core is added to a design in
> > Vivado, IBI and Hot-Join are options that are turned on or off, so two
> > builds -- or two instances in the same build -- can use the identical IP
> > version and still differ in which features are present.
> > 
> > The compatible string identifies the IP core and its version. It says 
> 
> Well, you miss SoC compatibles so you cannot use argument of IP core.
> Although I do accept argument of two instances in a SoC having this
> different.

How are SoC compatibles relevant here? It's an IP for FPGA fabric, so
even if you made some sort of zynq specific compatible (which I am not
advocating for to be clear) the IP configuration options may vary
between synthesis runs, so a SoC-specific compatible doesn't help.

> 
> > nothing about which options were selected when
> > that instance was built, so it cannot imply the capability.
> > 
> > Thanks,
> Best regards,
> Krzysztof

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]