[PATCH v3 1/2] ASoC: dt-bindings: cs35l45: Adds SYNC properties

[PATCH v3 1/2] ASoC: dt-bindings: cs35l45: Adds SYNC properties

[Ricardo Rivera-Matos]

Introduces support for the multidevice synchronization (SYNC)
bus. The properties introduced allow for the configuration
of the device's transmitter IDs.

Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
---
 .../bindings/sound/cirrus,cs35l45.yaml        | 27 +++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml
index 70f6c62aedca..20d758dc442f 100644
--- a/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml
+++ b/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml
@@ -53,6 +53,29 @@ properties:
     maximum: 3
     default: 2
 
+  sync:
+    description:
+      Multidevice synchronization (SYNC) bus configuration
+    type: object
+    additionalProperties: false
+    properties:
+      cirrus,sync-lsw-txid:
+        description:
+          Transmitter ID to use for long software (LSW) data packets
+          on the SYNC bus.
+        $ref: /schemas/types.yaml#/definitions/uint32
+        minimum: 0
+        maximum: 7
+        default: 0
+      cirrus,sync-sw-txid:
+        description:
+          Transmitter ID to use for short software (SW) data packets
+          on the SYNC bus.
+        $ref: /schemas/types.yaml#/definitions/uint32
+        minimum: 0
+        maximum: 7
+        default: 0
+
 patternProperties:
   "^cirrus,gpio-ctrl[1-3]$":
     description:
@@ -155,5 +178,9 @@ examples:
              gpio-ctrl = <0x1>;
              gpio-dir = <0x1>;
           };
+          sync {
+             cirrus,sync-lsw-txid = <0x1>;
+             cirrus,sync-sw-txid = <0x1>;
+          };
         };
     };
-- 
2.43.0

[PATCH v3 2/2] ASoC: cs35l45: Adds support for SYNC bus

[Ricardo Rivera-Matos]

Adds support for the multidevice synchronization (SYNC) bus.
The SYNC bus is an opaque one wire bus that is shared between
Cirrus devices. Initial support only includes software (SW)
data packets.

Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
---
 sound/soc/codecs/cs35l45-tables.c |  4 ++
 sound/soc/codecs/cs35l45.c        | 93 +++++++++++++++++++++++++++++--
 sound/soc/codecs/cs35l45.h        | 23 ++++++++
 3 files changed, 116 insertions(+), 4 deletions(-)

diff --git a/sound/soc/codecs/cs35l45-tables.c b/sound/soc/codecs/cs35l45-tables.c
index 764dbaa35042..57982b8ae645 100644
--- a/sound/soc/codecs/cs35l45-tables.c
+++ b/sound/soc/codecs/cs35l45-tables.c
@@ -51,6 +51,8 @@ static const struct reg_default cs35l45_defaults[] = {
 	{ CS35L45_WKI2C_CTL,			0x00000030 },
 	{ CS35L45_REFCLK_INPUT,			0x00000510 },
 	{ CS35L45_GLOBAL_SAMPLE_RATE,		0x00000003 },
+	{ CS35L45_SYNC_TX_RX_ENABLES,		0x00000200 },
+	{ CS35L45_SYNC_SW_TX_ID,		0x00000000 },
 	{ CS35L45_ASP_ENABLES1,			0x00000000 },
 	{ CS35L45_ASP_CONTROL1,			0x00000028 },
 	{ CS35L45_ASP_CONTROL2,			0x18180200 },
@@ -134,6 +136,8 @@ static bool cs35l45_readable_reg(struct device *dev, unsigned int reg)
 	case CS35L45_PWRMGT_STS:
 	case CS35L45_REFCLK_INPUT:
 	case CS35L45_GLOBAL_SAMPLE_RATE:
+	case CS35L45_SYNC_TX_RX_ENABLES:
+	case CS35L45_SYNC_SW_TX_ID:
 	case CS35L45_ASP_ENABLES1:
 	case CS35L45_ASP_CONTROL1:
 	case CS35L45_ASP_CONTROL2:
diff --git a/sound/soc/codecs/cs35l45.c b/sound/soc/codecs/cs35l45.c
index a032bb23b4ac..559fae09674c 100644
--- a/sound/soc/codecs/cs35l45.c
+++ b/sound/soc/codecs/cs35l45.c
@@ -6,6 +6,7 @@
 //
 // Author: James Schulman <james.schulman@cirrus.com>
 
+#include <linux/bitfield.h>
 #include <linux/gpio/consumer.h>
 #include <linux/module.h>
 #include <linux/pm_runtime.h>
@@ -195,6 +196,38 @@ static int cs35l45_activate_ctl(struct snd_soc_component *component,
 	return 0;
 }
 
+static int cs35l45_sync_en_get(struct snd_kcontrol *kcontrol,
+				      struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
+	struct cs35l45_private *cs35l45 =
+			snd_soc_component_get_drvdata(component);
+
+	ucontrol->value.integer.value[0] = cs35l45->sync_en;
+
+	return 0;
+}
+
+static int cs35l45_sync_en_put(struct snd_kcontrol *kcontrol,
+				      struct snd_ctl_elem_value *ucontrol)
+{
+	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
+	struct cs35l45_private *cs35l45 =
+			snd_soc_component_get_drvdata(component);
+
+	if (ucontrol->value.integer.value[0] == cs35l45->sync_en)
+		return 1;
+
+	if ((bool)ucontrol->value.integer.value[0])
+		regmap_set_bits(cs35l45->regmap, CS35L45_BLOCK_ENABLES2, CS35L45_SYNC_EN_MASK);
+	else
+		regmap_clear_bits(cs35l45->regmap, CS35L45_BLOCK_ENABLES2, CS35L45_SYNC_EN_MASK);
+
+	cs35l45->sync_en = ucontrol->value.integer.value[0];
+
+	return 1;
+}
+
 static int cs35l45_amplifier_mode_get(struct snd_kcontrol *kcontrol,
 				      struct snd_ctl_elem_value *ucontrol)
 {
@@ -591,6 +624,18 @@ static SOC_ENUM_SINGLE_DECL(amplifier_mode_enum, SND_SOC_NOPM, 0,
 static DECLARE_TLV_DB_SCALE(amp_gain_tlv, 1000, 300, 0);
 static const DECLARE_TLV_DB_SCALE(cs35l45_dig_pcm_vol_tlv, -10225, 25, true);
 
+static const struct snd_kcontrol_new cs35l45_sync_controls[] = {
+	SOC_SINGLE_BOOL_EXT("SYNC Enable", 0, cs35l45_sync_en_get, cs35l45_sync_en_put),
+	SOC_SINGLE("SYNC LSW RX Enable", CS35L45_SYNC_TX_RX_ENABLES,
+			CS35L45_SYNC_LSW_RX_EN_SHIFT, 1, 0),
+	SOC_SINGLE("SYNC LSW TX Enable", CS35L45_SYNC_TX_RX_ENABLES,
+			CS35L45_SYNC_LSW_TX_EN_SHIFT, 1, 0),
+	SOC_SINGLE("SYNC SW RX Enable", CS35L45_SYNC_TX_RX_ENABLES,
+			CS35L45_SYNC_SW_RX_EN_SHIFT, 1, 0),
+	SOC_SINGLE("SYNC SW TX Enable", CS35L45_SYNC_TX_RX_ENABLES,
+			CS35L45_SYNC_SW_TX_EN_SHIFT, 1, 0),
+};
+
 static const struct snd_kcontrol_new cs35l45_controls[] = {
 	SOC_ENUM_EXT("Amplifier Mode", amplifier_mode_enum,
 		     cs35l45_amplifier_mode_get, cs35l45_amplifier_mode_put),
@@ -880,6 +925,19 @@ static struct snd_soc_dai_driver cs35l45_dai[] = {
 static int cs35l45_component_probe(struct snd_soc_component *component)
 {
 	struct cs35l45_private *cs35l45 = snd_soc_component_get_drvdata(component);
+	int ret;
+
+	ret = snd_soc_add_component_controls(component, cs35l45_controls,
+					     ARRAY_SIZE(cs35l45_controls));
+	if (ret < 0)
+		return ret;
+
+	if (cs35l45->sync_pin_set) {
+		ret = snd_soc_add_component_controls(component, cs35l45_sync_controls,
+						     ARRAY_SIZE(cs35l45_sync_controls));
+		if (ret < 0)
+			return ret;
+	}
 
 	return wm_adsp2_component_probe(&cs35l45->dsp, component);
 }
@@ -901,9 +959,6 @@ static const struct snd_soc_component_driver cs35l45_component = {
 	.dapm_routes = cs35l45_dapm_routes,
 	.num_dapm_routes = ARRAY_SIZE(cs35l45_dapm_routes),
 
-	.controls = cs35l45_controls,
-	.num_controls = ARRAY_SIZE(cs35l45_controls),
-
 	.name = "cs35l45",
 
 	.endianness = 1,
@@ -1064,6 +1119,25 @@ static int cs35l45_sys_resume(struct device *dev)
 	return 0;
 }
 
+static int cs35l45_apply_sync_property_config(struct cs35l45_private *cs35l45,
+					      struct device_node *child)
+{
+	unsigned int val;
+	int ret;
+
+	ret = of_property_read_u32(child, "cirrus,sync-lsw-txid", &val);
+	if (!ret)
+		regmap_update_bits(cs35l45->regmap, CS35L45_SYNC_SW_TX_ID,
+				   CS35L45_SYNC_LSW_TXID_MASK, val << CS35L45_SYNC_LSW_TXID_SHIFT);
+
+	ret = of_property_read_u32(child, "cirrus,sync-sw-txid", &val);
+	if (!ret)
+		regmap_update_bits(cs35l45->regmap, CS35L45_SYNC_SW_TX_ID,
+				   CS35L45_SYNC_SW_TXID_MASK, val);
+
+	return 0;
+}
+
 static int cs35l45_apply_property_config(struct cs35l45_private *cs35l45)
 {
 	struct device_node *node = cs35l45->dev->of_node;
@@ -1110,10 +1184,13 @@ static int cs35l45_apply_property_config(struct cs35l45_private *cs35l45)
 					   val << CS35L45_GPIO_POL_SHIFT);
 
 		ret = of_property_read_u32(child, "gpio-ctrl", &val);
-		if (!ret)
+		if (!ret) {
+			if ((i == 0) && (val == CS35L45_GP1_CTRL_MDSYNC))
+				cs35l45->sync_pin_set = true;
 			regmap_update_bits(cs35l45->regmap, pad_regs[i],
 					   CS35L45_GPIO_CTRL_MASK,
 					   val << CS35L45_GPIO_CTRL_SHIFT);
+		}
 
 		ret = of_property_read_u32(child, "gpio-invert", &val);
 		if (!ret) {
@@ -1134,6 +1211,14 @@ static int cs35l45_apply_property_config(struct cs35l45_private *cs35l45)
 				   val << CS35L45_ASP_DOUT_HIZ_CTRL_SHIFT);
 	}
 
+	if (cs35l45->sync_pin_set) {
+		child = of_get_child_by_name(node, "sync");
+		if (child)
+			cs35l45_apply_sync_property_config(cs35l45, child);
+
+		of_node_put(child);
+	}
+
 	return 0;
 }
 
diff --git a/sound/soc/codecs/cs35l45.h b/sound/soc/codecs/cs35l45.h
index 7a790d2acac7..f8a4713ae92f 100644
--- a/sound/soc/codecs/cs35l45.h
+++ b/sound/soc/codecs/cs35l45.h
@@ -35,6 +35,8 @@
 #define CS35L45_PWRMGT_STS			0x0000290C
 #define CS35L45_REFCLK_INPUT			0x00002C04
 #define CS35L45_GLOBAL_SAMPLE_RATE		0x00002C0C
+#define CS35L45_SYNC_TX_RX_ENABLES		0x00003400
+#define CS35L45_SYNC_SW_TX_ID			0x00003408
 #define CS35L45_BOOST_CCM_CFG			0x00003808
 #define CS35L45_BOOST_DCM_CFG			0x0000380C
 #define CS35L45_BOOST_OV_CFG			0x0000382C
@@ -183,6 +185,8 @@
 #define CS35L45_ASP_EN_SHIFT			27
 #define CS35L45_AMP_DRE_EN_SHIFT		20
 #define CS35L45_AMP_DRE_EN_MASK		BIT(20)
+#define CS35L45_SYNC_EN_SHIFT			8
+#define CS35L45_SYNC_EN_MASK			BIT(8)
 #define CS35L45_MEM_RDY_SHIFT			1
 #define CS35L45_MEM_RDY_MASK			BIT(1)
 
@@ -220,6 +224,22 @@
 #define CS35L45_44P100_KHZ			0x0B
 #define CS35L45_88P200_KHZ			0x0C
 
+/* SYNC_TX_RX_ENABLES */
+#define CS35L45_SYNC_LSW_RX_EN_SHIFT		19
+#define CS35L45_SYNC_LSW_RX_EN_MASK		BIT(19)
+#define CS35L45_SYNC_LSW_TX_EN_SHIFT		18
+#define CS35L45_SYNC_LSW_TX_EN_MASK		BIT(18)
+#define CS35L45_SYNC_SW_RX_EN_SHIFT		17
+#define CS35L45_SYNC_SW_RX_EN_MASK		BIT(17)
+#define CS35L45_SYNC_SW_TX_EN_SHIFT		16
+#define CS35L45_SYNC_SW_TX_EN_MASK		BIT(16)
+
+/* SYNC_SW_TX_ID */
+#define CS35L45_SYNC_LSW_TXID_SHIFT		8
+#define CS35L45_SYNC_LSW_TXID_MASK		GENMASK(10, 8)
+#define CS35L45_SYNC_SW_TXID_SHIFT		0
+#define CS35L45_SYNC_SW_TXID_MASK		GENMASK(2, 0)
+
 /* ASP_ENABLES_1 */
 #define CS35L45_ASP_RX2_EN_SHIFT		17
 #define CS35L45_ASP_RX1_EN_SHIFT		16
@@ -320,6 +340,7 @@
 #define CS35L45_GPIO_CTRL_MASK			GENMASK(22, 20)
 #define CS35L45_GPIO_INVERT_SHIFT		19
 #define CS35L45_GPIO_INVERT_MASK		BIT(19)
+#define CS35L45_GP1_CTRL_MDSYNC		0x2
 
 /* CS35L45_IRQ1_EINT_1 */
 #define CS35L45_BST_UVP_ERR_SHIFT		7
@@ -493,6 +514,8 @@ struct cs35l45_private {
 	struct regulator *vdd_a;
 	bool initialized;
 	bool sysclk_set;
+	bool sync_en;
+	bool sync_pin_set;
 	u8 slot_width;
 	u8 slot_count;
 	int amplifier_mode;
-- 
2.43.0

[PATCH v3 0/2] Introduces MDSYNC support for CS35L45

[Ricardo Rivera-Matos]

The CS35L45 has SYNC pin that can be used as a multi
device synchronization (MDSYNC) bus. This pin can send
various message types between Cirrus devices.

This patch series adds support for long and short DSP
messages between CS35L45 devices. 

Each device on the SYNC bus must have a unique transmitter
identifier per message type as the bus arbitrates message
priority via this identifier. These identifiers are set by
the introduced devicetree properties. The priority 
assignment is intended to be a static system integration
decision.

The relevant receiver controls are introduced as mixer
controls so they are exposed at runtime to be configured
for the appropriate use cases.

Changes since v1:
 - Fixed property parsing namespace issue

Changes since v2:
 - snd_soc_kcontrol_component -> snd_kcontrol_chip
 - only register sync controls if GPIO mux selects SYNC
 - return 1 on cs35l45_sync_en_put success
 - drop | in dt property description

Ricardo Rivera-Matos (2):
  ASoC: dt-bindings: cs35l45: Adds SYNC properties
  ASoC: cs35l45: Adds support for SYNC bus

 .../bindings/sound/cirrus,cs35l45.yaml        | 27 ++++++
 sound/soc/codecs/cs35l45-tables.c             |  4 +
 sound/soc/codecs/cs35l45.c                    | 93 ++++++++++++++++++-
 sound/soc/codecs/cs35l45.h                    | 23 +++++
 4 files changed, 143 insertions(+), 4 deletions(-)


base-commit: 2792cc1b80b7674cc0751b34a964aad76630c1fa
-- 
2.43.0

Re: [PATCH v3 2/2] ASoC: cs35l45: Adds support for SYNC bus

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

New issues:
- [High] The `cs35l45_sync_en_put` ALSA control put callback incorrectly returns 1 when unchanged, ignores regmap errors, and lacks locking.
- [Medium] Boolean ALSA controls in `cs35l45_sync_controls` are incorrectly named with the suffix ' Enable' instead of ' Switch'.

Pre-existing issues:
- [High] The `cs35l45_amplifier_mode_put` ALSA control updates the software shadow state (`cs35l45->amplifier_mode`) and performs its precondition check outside of the DAPM mutex.
--

--- Patch [2]: [PATCH v3 2/2] ASoC: cs35l45: Adds support for SYNC bus ---
commit ba724d28c232323128106bdc26fdc20dca80f285
Author: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>

ASoC: cs35l45: Adds support for SYNC bus
    
Adds support for the multidevice synchronization (SYNC) bus.
The SYNC bus is an opaque one wire bus that is shared between
Cirrus devices. Initial support only includes software (SW)
data packets.

> diff --git a/sound/soc/codecs/cs35l45.c b/sound/soc/codecs/cs35l45.c
> index a032bb23b4ac7..559fae09674cc 100644
> --- a/sound/soc/codecs/cs35l45.c
> +++ b/sound/soc/codecs/cs35l45.c

[ ... ]

> @@ -195,6 +196,38 @@ static int cs35l45_activate_ctl(struct snd_soc_component *component,
>  	return 0;
>  }
>  
> +static int cs35l45_sync_en_get(struct snd_kcontrol *kcontrol,
> +				      struct snd_ctl_elem_value *ucontrol)
> +{
> +	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
> +	struct cs35l45_private *cs35l45 =
> +			snd_soc_component_get_drvdata(component);
> +
> +	ucontrol->value.integer.value[0] = cs35l45->sync_en;
> +
> +	return 0;
> +}
> +
> +static int cs35l45_sync_en_put(struct snd_kcontrol *kcontrol,
> +				      struct snd_ctl_elem_value *ucontrol)
> +{
> +	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
> +	struct cs35l45_private *cs35l45 =
> +			snd_soc_component_get_drvdata(component);
> +
> +	if (ucontrol->value.integer.value[0] == cs35l45->sync_en)
> +		return 1;

[Severity: High]
Does this incorrectly return 1 when the value is unchanged?

The ALSA kcontrol API expects 0 when the value is unchanged, so returning 1
will cause spurious change events to be broadcast to userspace.

> +
> +	if ((bool)ucontrol->value.integer.value[0])
> +		regmap_set_bits(cs35l45->regmap, CS35L45_BLOCK_ENABLES2, CS35L45_SYNC_EN_MASK);
> +	else
> +		regmap_clear_bits(cs35l45->regmap, CS35L45_BLOCK_ENABLES2, CS35L45_SYNC_EN_MASK);
> +
> +	cs35l45->sync_en = ucontrol->value.integer.value[0];
> +
> +	return 1;
> +}

[Severity: High]
Is it safe to ignore the return values from regmap_set_bits() and
regmap_clear_bits() here? 

If the I/O operation fails, the software shadow state will become
desynchronized from the actual hardware state.

Also, should this state update be protected by a lock? 

Concurrent writes via snd_ctl_elem_write() could trigger race conditions since
the state check and update are not atomic.

[ ... ]

> @@ -591,6 +624,18 @@ static SOC_ENUM_SINGLE_DECL(amplifier_mode_enum, SND_SOC_NOPM, 0,
>  static DECLARE_TLV_DB_SCALE(amp_gain_tlv, 1000, 300, 0);
>  static const DECLARE_TLV_DB_SCALE(cs35l45_dig_pcm_vol_tlv, -10225, 25, true);
>  
> +static const struct snd_kcontrol_new cs35l45_sync_controls[] = {
> +	SOC_SINGLE_BOOL_EXT("SYNC Enable", 0, cs35l45_sync_en_get, cs35l45_sync_en_put),
> +	SOC_SINGLE("SYNC LSW RX Enable", CS35L45_SYNC_TX_RX_ENABLES,
> +			CS35L45_SYNC_LSW_RX_EN_SHIFT, 1, 0),
> +	SOC_SINGLE("SYNC LSW TX Enable", CS35L45_SYNC_TX_RX_ENABLES,
> +			CS35L45_SYNC_LSW_TX_EN_SHIFT, 1, 0),
> +	SOC_SINGLE("SYNC SW RX Enable", CS35L45_SYNC_TX_RX_ENABLES,
> +			CS35L45_SYNC_SW_RX_EN_SHIFT, 1, 0),
> +	SOC_SINGLE("SYNC SW TX Enable", CS35L45_SYNC_TX_RX_ENABLES,
> +			CS35L45_SYNC_SW_TX_EN_SHIFT, 1, 0),
> +};

[Severity: Medium]
Do these boolean controls need to end in " Switch" instead of " Enable"?

ALSA control naming conventions mandate that boolean controls must end in
" Switch". Standard user-space audio layers (like PulseAudio and PipeWire)
rely on this to recognize them as toggles rather than exposing them as
raw integers.

[ ... ]

While reviewing the ALSA controls, I noticed a pre-existing issue in the
cs35l45_amplifier_mode_put() function:

sound/soc/codecs/cs35l45.c:cs35l45_amplifier_mode_put() {
    ...
    snd_soc_dapm_mutex_unlock(dapm);

    cs35l45->amplifier_mode = ucontrol->value.integer.value[0];

    return 1;
}

[Severity: High]
This is a pre-existing issue, but does cs35l45_amplifier_mode_put() update
the software shadow state outside of the DAPM mutex? 

If two threads execute the put callback concurrently with different target
modes, thread B could check the condition before thread A completes its
hardware update. This could lead to the shadow state becoming out of sync
with the hardware.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260821160946.95258-1-rriveram@opensource.cirrus.com?part=2

Re: [PATCH v3 0/2] Introduces MDSYNC support for CS35L45

[Mark Brown]

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On Fri, Aug 21, 2026 at 04:09:44PM +0000, Ricardo Rivera-Matos wrote:
> The CS35L45 has SYNC pin that can be used as a multi
> device synchronization (MDSYNC) bus. This pin can send
> various message types between Cirrus devices.

Something is broken with how you're posting your patches which
consistently causes your cover letter to appear as the last message in
the series rather than the first.  Not sure what's up with that, haven't
seen other people with similar issues.

You might want to look at b4 to send the patches, especially it's web
submission endpoint which avoids having to configure mail:

   https://b4.docs.kernel.org/en/latest/contributor/overview.html


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Re: [PATCH v3 0/2] Introduces MDSYNC support for CS35L45

[Ricardo Rivera-Matos]

On 8/21/26 11:23 AM, Mark Brown wrote:
> On Fri, Aug 21, 2026 at 04:09:44PM +0000, Ricardo Rivera-Matos wrote:
>> The CS35L45 has SYNC pin that can be used as a multi
>> device synchronization (MDSYNC) bus. This pin can send
>> various message types between Cirrus devices.
> 
> Something is broken with how you're posting your patches which
> consistently causes your cover letter to appear as the last message in
> the series rather than the first.  Not sure what's up with that, haven't
> seen other people with similar issues.
> 
> You might want to look at b4 to send the patches, especially it's web
> submission endpoint which avoids having to configure mail:
> 
>     https://b4.docs.kernel.org/en/latest/contributor/overview.html
> 

Thanks for the tip. I'll give it a shot on v4.