From: sashiko-bot@kernel.org
To: "Alex Ousherovitch" <aousherovitch@rambus.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v4 07/19] crypto: cmh - add SM3 ahash
Date: Tue, 25 Aug 2026 22:28:47 +0000 [thread overview]
Message-ID: <20260825222847.C93BD1F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260825221539.255951-8-aousherovitch@rambus.com>
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] Deterministic failure on large hash updates due to a single large kmalloc linearization.
- [High] Race condition leading to Use-After-Free or state corruption because the request context and input buffers are modified after asynchronous submission.
- [High] DMA mapping of an unaligned embedded structure member violates the DMA API, causes cache coherency corruption, and risks kernel panics if mapped from a vmap stack.
--
commit db71afa324a1c32abd2a50db9da6330962bdae16
Author: Alex Ousherovitch <aousherovitch@rambus.com>
crypto: cmh - add SM3 ahash
Register the SM3 ahash algorithm using the CMH SM3 core. Supports
incremental update, finup, final, and export/import functionality.
> diff --git a/drivers/crypto/cmh/cmh_sm3.c b/drivers/crypto/cmh/cmh_sm3.c
> new file mode 100644
> index 0000000000000..8dbc46c30a40f
> --- /dev/null
> +++ b/drivers/crypto/cmh/cmh_sm3.c
[ ... ]
> +struct cmh_sm3_reqctx {
> + int error;
> + u32 hw_started;
> + u32 buf_len;
> + u32 has_checkpoint;
> + u8 checkpoint[SM3_CONTEXT_SIZE]; /* SM3 context from last SAVE */
> + /* DMA state for current async operation */
[ ... ]
> +static int cmh_sm3_update(struct ahash_request *req)
> +{
[ ... ]
> + /*
> + * full_len is user-controlled and can exceed KMALLOC_MAX_SIZE for a
> + * single large update; __GFP_NOWARN avoids splatting the page
> + * allocator on an oversized request.
> + */
> + rctx->data_buf = kmalloc(full_len, gfp | __GFP_NOWARN);
> + if (!rctx->data_buf)
> + return -ENOMEM;
[Severity: High]
Is it safe to assume the entire remaining data can be linearized into a
single kmalloc buffer? If a caller attempts to hash a large input (e.g.,
several megabytes) using the ahash API via AF_ALG, this allocation will
predictably fail for sizes exceeding KMALLOC_MAX_SIZE or under memory
fragmentation, which breaks the API contract.
[ ... ]
> + rctx->ckpt_dma = DMA_MAPPING_ERROR;
> + if (rctx->has_checkpoint) {
> + rctx->ckpt_dma = cmh_dma_map_single(rctx->checkpoint,
> + SM3_CONTEXT_SIZE,
> + DMA_TO_DEVICE);
[Severity: High]
Does mapping this inline checkpoint buffer violate the DMA API?
The checkpoint array is embedded directly inside struct cmh_sm3_reqctx without
ARCH_DMA_MINALIGN alignment, which can lead to cacheline corruption on
non-coherent architectures when adjacent fields are modified.
Additionally, if the request context is allocated on the stack (for instance
via AHASH_REQUEST_ON_STACK) on a system with CONFIG_VMAP_STACK enabled, mapping
a stack address results in a bogus physical address and can cause kernel
panics.
[ ... ]
> + ret = cmh_vcq_pack_and_submit_async(cmds, idx, rctx->packed,
> + CMH_SM3_MAX_PACKED,
> + d.mbx_idx,
> + cmh_sm3_update_complete, req,
> + !!(req->base.flags &
> + CRYPTO_TFM_REQ_MAY_BACKLOG),
> + cmh_tm_async_timeout_jiffies());
> + if (ret && ret != -EBUSY)
> + goto err_unmap_ckpt;
> +
> + /*
> + * Submit accepted (in flight or backlogged) -- only now move the tail
> + * into the holdback. A synchronous rejection above (e.g. -EAGAIN)
> + * leaves rctx->buf/buf_len untouched so the caller can retry the
> + * identical update.
> + */
> + if (tail_len > 0) {
> + if (req->base.flags & CRYPTO_AHASH_REQ_VIRT)
> + memcpy(rctx->buf, req->svirt + from_src, tail_len);
> + else
> + scatterwalk_map_and_copy(rctx->buf, req->src,
> + from_src, tail_len, 0);
> + }
> + rctx->buf_len = tail_len;
[Severity: High]
Is there a race condition here that could lead to a use-after-free or state
corruption?
This block modifies the holdback buffer (rctx->buf) and reads from the request
input (req->svirt or req->src) after ownership has already been yielded to the
hardware asynchronously via cmh_vcq_pack_and_submit_async().
If the hardware completes the operation quickly, the interrupt handler could
execute cmh_sm3_update_complete() on another CPU and signal completion to the
caller. The caller could then free or reuse the request and its scatterlists
while this thread is still copying the tail bytes from the freed memory.
[ ... ]
> +static int cmh_sm3_submit_final(struct ahash_request *req,
> + u8 *data_buf, u32 data_len)
> +{
[ ... ]
> + rctx->ckpt_dma = DMA_MAPPING_ERROR;
> + if (rctx->has_checkpoint) {
> + rctx->ckpt_dma = cmh_dma_map_single(rctx->checkpoint,
> + SM3_CONTEXT_SIZE,
> + DMA_TO_DEVICE);
[Severity: High]
Similarly, in the finalization stage, can mapping this embedded inline buffer
cause DMA API violations or kernel panics on vmap stacks?
[ ... ]
> +static int cmh_sm3_finup(struct ahash_request *req)
> +{
[ ... ]
> + gfp = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP ?
> + GFP_KERNEL : GFP_ATOMIC;
> +
> + data_buf = kmalloc(data_len, gfp | __GFP_NOWARN);
> + if (!data_buf)
> + return -ENOMEM;
[Severity: High]
Does this finup path have the same issue with large inputs?
Because data_len could be very large depending on the caller, this single
kmalloc attempt could deterministically fail if it exceeds KMALLOC_MAX_SIZE,
similar to the issue in the update path.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260825221539.255951-1-aousherovitch@rambus.com?part=7
next prev parent reply other threads:[~2026-08-25 22:28 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-25 22:15 [PATCH v4 00/19] crypto: cmh - add Rambus CryptoManager Hub driver Alex Ousherovitch
2026-08-25 22:15 ` [PATCH v4 01/19] dt-bindings: crypto: add Rambus CryptoManager Hub Alex Ousherovitch
2026-08-25 22:28 ` sashiko-bot
2026-08-26 17:02 ` Conor Dooley
2026-08-27 1:39 ` Ousherovitch, Alex
2026-08-25 22:15 ` [PATCH v4 02/19] crypto: cmh - add core platform driver Alex Ousherovitch
2026-08-25 22:34 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 03/19] crypto: cmh - add key provisioning and management Alex Ousherovitch
2026-08-25 22:30 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 04/19] crypto: cmh - add SHA-2/SHA-3/SHAKE ahash Alex Ousherovitch
2026-08-25 22:27 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 05/19] crypto: cmh - add HMAC ahash Alex Ousherovitch
2026-08-25 22:30 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 06/19] crypto: cmh - add CSHAKE/KMAC ahash Alex Ousherovitch
2026-08-25 22:30 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 07/19] crypto: cmh - add SM3 ahash Alex Ousherovitch
2026-08-25 22:28 ` sashiko-bot [this message]
2026-08-25 22:15 ` [PATCH v4 08/19] crypto: cmh - add AES skcipher/aead/cmac Alex Ousherovitch
2026-08-25 22:28 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 09/19] crypto: cmh - add SM4 skcipher/aead/cmac/xcbc Alex Ousherovitch
2026-08-25 22:25 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 10/19] crypto: cmh - add ChaCha20-Poly1305 Alex Ousherovitch
2026-08-25 22:30 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 11/19] crypto: cmh - add DRBG hwrng Alex Ousherovitch
2026-08-25 22:32 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 12/19] crypto: cmh - add RSA akcipher Alex Ousherovitch
2026-08-25 22:15 ` [PATCH v4 13/19] crypto: cmh - add ECDSA/SM2 sig Alex Ousherovitch
2026-08-25 22:15 ` [PATCH v4 14/19] crypto: cmh - add ECDH/X25519 kpp Alex Ousherovitch
2026-08-25 22:41 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 15/19] crypto: cmh - add ML-KEM/ML-DSA (QSE) Alex Ousherovitch
2026-08-25 22:36 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 16/19] crypto: cmh - add SLH-DSA/LMS/XMSS (HCQ) Alex Ousherovitch
2026-08-25 22:37 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 17/19] Documentation: ioctl: add CMH ioctl documentation and register 'J' Alex Ousherovitch
2026-08-25 22:34 ` sashiko-bot
2026-08-25 22:15 ` [PATCH v4 18/19] selftests: crypto: cmh - add kselftest for management ioctl Alex Ousherovitch
2026-08-25 22:15 ` [PATCH v4 19/19] MAINTAINERS: add Rambus CryptoManager Hub (CMH) Alex Ousherovitch
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