[PATCH] dt-bindings: arm-smmu: Document Adreno SMMU for Nord SoC

[PATCH] dt-bindings: arm-smmu: Document Adreno SMMU for Nord SoC

[Shawn Guo]

Add specific compatible string to document the GPU SMMU present on
Nord SoC.

Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index ffa33b7f4a96..ea338d313c05 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -102,6 +102,7 @@ properties:
               - qcom,hawi-smmu-500
               - qcom,kaanapali-smmu-500
               - qcom,milos-smmu-500
+              - qcom,nord-smmu-500
               - qcom,qcm2290-smmu-500
               - qcom,qcs615-smmu-500
               - qcom,qcs8300-smmu-500
-- 
2.43.0

Re: [PATCH] dt-bindings: arm-smmu: Document Adreno SMMU for Nord SoC

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Incomplete Binding Schema: `qcom,nord-smmu-500` bypasses clock restrictions because it was omitted from the Adreno-specific if-then conditional blocks.
--

commit c82163177cdbe8e91a89f7aadb6d4d1e2a85afb2
Author: Shawn Guo <shengchao.guo@oss.qualcomm.com>

dt-bindings: arm-smmu: Document Adreno SMMU for Nord SoC

Add a specific compatible string to document the GPU SMMU present on
the Nord SoC.

> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index ffa33b7f4a965..ea338d313c052 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -102,6 +102,7 @@ properties:
>                - qcom,hawi-smmu-500
>                - qcom,kaanapali-smmu-500
>                - qcom,milos-smmu-500
> +              - qcom,nord-smmu-500

[Severity: Medium]
Does this new compatible string need to be added to the Adreno-specific
if-then conditional block in the allOf section?

When qcom,nord-smmu-500 is omitted from the conditional block that matches
other Adreno SMMUs (like qcom,milos-smmu-500 and qcom,sm8550-smmu-500),
the schema might silently permit invalid clock configurations. It appears to
bypass the specific clock restrictions for Adreno SMMUs and defaults directly
to an unconstrained state (1 to 7 clocks) since Adreno SMMUs use a 4-item
fallback array.

Should qcom,nord-smmu-500 be appended to the enum list in the allOf block
to enforce the correct hardware-specific constraints?

>                - qcom,qcm2290-smmu-500
>                - qcom,qcs615-smmu-500
>                - qcom,qcs8300-smmu-500

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260901140816.74200-1-shengchao.guo@oss.qualcomm.com?part=1

Re: [PATCH] dt-bindings: arm-smmu: Document Adreno SMMU for Nord SoC

[Shawn Guo]

On Tue, Sep 01, 2026 at 10:08:16PM +0800, Shawn Guo wrote:
> Add specific compatible string to document the GPU SMMU present on
> Nord SoC.
> 
> Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
> ---
>  Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index ffa33b7f4a96..ea338d313c05 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -102,6 +102,7 @@ properties:
>                - qcom,hawi-smmu-500
>                - qcom,kaanapali-smmu-500
>                - qcom,milos-smmu-500
> +              - qcom,nord-smmu-500

Ah, Sashiko is right! Nord GPU SMMU also has a vote clock, so it
should be added to the clock constraint list as well. Will update.

Shawn

>                - qcom,qcm2290-smmu-500
>                - qcom,qcs615-smmu-500
>                - qcom,qcs8300-smmu-500
> -- 
> 2.43.0
>