From: Alexey Charkov <alchark@flipper.net>
To: Srinivas Kandagatla <srini@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Michael Walle <michael@walle.cc>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Finley Xiao <finley.xiao@rock-chips.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
Alexey Charkov <alchark@flipper.net>
Subject: [PATCH v2 2/4] dt-bindings: nvmem: layouts: Add Rockchip OTP CPUID layout
Date: Wed, 02 Sep 2026 17:07:53 +0400 [thread overview]
Message-ID: <20260902-rk3576-otp-cpuid-mac-v2-2-e4b7fe2ab13f@flipper.net> (raw)
In-Reply-To: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net>
Rockchip SoCs ship with a unique CPU ID programmed into their internal OTP
memory, and Rockchip bootloaders derive Ethernet MAC addresses from it so
that boards with no dedicated storage for one still get a stable address.
Describe that derivation as an NVMEM layout, so that the resulting
addresses become available through the standard nvmem "mac-address" cell
whether or not the firmware got a chance to patch them into the device
tree. Keep the compatible SoC specific, as the location of the CPU ID
within the OTP memory differs between SoCs.
Signed-off-by: Alexey Charkov <alchark@flipper.net>
---
.../bindings/nvmem/layouts/nvmem-layout.yaml | 1 +
.../nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml | 73 ++++++++++++++++++++++
MAINTAINERS | 6 ++
3 files changed, 80 insertions(+)
diff --git a/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml b/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml
index 382507060651..ab94dbb41aac 100644
--- a/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml
+++ b/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml
@@ -21,6 +21,7 @@ oneOf:
- $ref: fixed-layout.yaml
- $ref: kontron,sl28-vpd.yaml
- $ref: onie,tlv-layout.yaml
+ - $ref: rockchip,rk3576-otp-cpuid.yaml
- $ref: u-boot,env.yaml
properties:
diff --git a/Documentation/devicetree/bindings/nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml b/Documentation/devicetree/bindings/nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml
new file mode 100644
index 000000000000..85153d480950
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVMEM layout of the CPU ID in Rockchip OTP memory
+
+maintainers:
+ - Alexey Charkov <alchark@flipper.net>
+
+description: |
+ Rockchip SoCs are shipped with a unique CPU ID programmed into their
+ internal OTP memory. Rockchip bootloaders derive Ethernet MAC addresses
+ from it, so that boards which have no dedicated storage for a MAC address
+ still get a stable one. The addresses are computed by hashing the lowercase
+ hexadecimal representation of the CPU ID with SHA-256 and taking the first
+ six octets of the digest, with the multicast bit cleared and the locally
+ administered bit set.
+
+ The location of the CPU ID within the OTP memory differs between SoCs,
+ hence the SoC specific compatible.
+
+select: false
+
+properties:
+ compatible:
+ const: rockchip,rk3576-otp-cpuid
+
+ mac-address:
+ type: object
+ description:
+ MAC address derived from the CPU ID. The first argument of the phandle
+ selects one of the two addresses that can be derived (can be 0 or 1).
+
+ properties:
+ "#nvmem-cell-cells":
+ const: 1
+
+ additionalProperties: false
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/rockchip,rk3576-cru.h>
+ #include <dt-bindings/reset/rockchip,rk3576-cru.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ otp@2a580000 {
+ compatible = "rockchip,rk3576-otp";
+ reg = <0x0 0x2a580000 0x0 0x400>;
+ clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>,
+ <&cru CLK_OTP_PHY_G>;
+ clock-names = "otp", "apb_pclk", "phy";
+ resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>;
+ reset-names = "otp", "apb";
+
+ nvmem-layout {
+ compatible = "rockchip,rk3576-otp-cpuid";
+
+ otp_mac_address: mac-address {
+ #nvmem-cell-cells = <1>;
+ };
+ };
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index eb4e5a61056e..f3d07ce7b3c8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -23722,6 +23722,12 @@ F: Documentation/userspace-api/media/v4l/metafmt-rkisp1.rst
F: drivers/media/platform/rockchip/rkisp1
F: include/uapi/linux/rkisp1-config.h
+ROCKCHIP OTP CPUID NVMEM LAYOUT DRIVER
+M: Alexey Charkov <alchark@flipper.net>
+L: linux-rockchip@lists.infradead.org
+S: Maintained
+F: Documentation/devicetree/bindings/nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml
+
ROCKCHIP RK3568 RANDOM NUMBER GENERATOR SUPPORT
M: Daniel Golle <daniel@makrotopia.org>
M: Aurelien Jarno <aurelien@aurel32.net>
--
2.54.0
next prev parent reply other threads:[~2026-09-02 13:08 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-02 13:07 [PATCH v2 0/4] nvmem: Derive Rockchip MAC addresses from the OTP CPU ID Alexey Charkov
2026-09-02 13:07 ` [PATCH v2 1/4] nvmem: rockchip-otp: Serialize reads Alexey Charkov
2026-09-02 13:07 ` Alexey Charkov [this message]
2026-09-02 13:15 ` [PATCH v2 2/4] dt-bindings: nvmem: layouts: Add Rockchip OTP CPUID layout sashiko-bot
2026-09-02 13:07 ` [PATCH v2 3/4] nvmem: layouts: Add Rockchip OTP CPUID layout driver Alexey Charkov
2026-09-02 13:20 ` sashiko-bot
2026-09-02 13:07 ` [PATCH v2 4/4] arm64: dts: rockchip: Derive GMAC MAC addresses from OTP on RK3576 Alexey Charkov
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