[PATCH 0/3] arm64: dts: mediatek: UFS cleanup adaptation

[PATCH 0/3] arm64: dts: mediatek: UFS cleanup adaptation

[Louis-Alexis Eyraud]

This series goal is to adapt the Mediatek UFS dt-bindings changes
done by "MediaTek UFS Cleanup and MT8196 Enablement" series ([1])

The patches were present in the v10 revision of the series ([2])
but it was requested to be sent in a separate series. The first patch
was also modified to add a valid OPP table rather than simply dropping
the freq-table-hz array to fix an issue detected on this patch by
Sashiko ([3]) during [2] review.

The series is based on linux-next kernel tree (tag: next-20260901) and
depend on [1] with v11 or later.

[1]: https://lore.kernel.org/linux-mediatek/20260901-mt8196-ufs-v11-0-dbd007704490@collabora.com/
[2]: https://lore.kernel.org/linux-mediatek/20260730-mt8196-ufs-v10-0-bc5ecef202dc@collabora.com/
[3]: https://sashiko.dev/#/message/20260730-mt8196-ufs-v10-24-bc5ecef202dc%40collabora.com

Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
---
Louis-Alexis Eyraud (3):
      arm64: dts: mediatek: mt8195: Align ufshci node to dt-bindings changes
      arm64: dts: mediatek: mt8395-genio-1200-evk-ufs: Complete UFS power supplies
      arm64: dts: mediatek: mt8395-radxa-nio-12l: Complete UFS power supplies

 arch/arm64/boot/dts/mediatek/mt8195.dtsi           | 35 +++++++++++++++-------
 .../dts/mediatek/mt8395-genio-1200-evk-ufs.dts     |  3 ++
 .../boot/dts/mediatek/mt8395-radxa-nio-12l.dts     |  3 ++
 3 files changed, 30 insertions(+), 11 deletions(-)
---
base-commit: a7957fd910b93155d81edcdd4472551764c8957a
change-id: 20260901-mediatek-ufs-cleanup-dts-6a7f7a3e1292
prerequisite-message-id: <20260901-mt8196-ufs-v11-0-dbd007704490@collabora.com>
prerequisite-patch-id: 841e7d21c8ca7e3f35741279672e23c84db3d165
prerequisite-patch-id: 44f254cfdbb97cdf19ab4c2ab8126a95d6e2b050
prerequisite-patch-id: 5176591d5737581d21ff2d045e8f16c30fb8a39f
prerequisite-patch-id: 54d073543d7687cdc9cea3d91025b2bae3cc8e8f
prerequisite-patch-id: 3c082f576efeaaecae285d6ba734463b39f2a9df
prerequisite-patch-id: abe5e24769fbb4dd6399bb9ac3a6c7c8567fe6ce
prerequisite-patch-id: 1e16da816ec429b5261e5c2145ed11646acec4b7
prerequisite-patch-id: 89e0e053a67aba4c8897110ba32c9ee64acf7dff
prerequisite-patch-id: c968b5646b227ceb339883450a5bba635033cac3
prerequisite-patch-id: a193861af215b41231ff22aac96e3f230881d896
prerequisite-patch-id: 47fd54e3799a18734587ce17776f75c823ca6e23
prerequisite-patch-id: 7bce272ba16fd694baa7e75c3612c48b64b70ed0
prerequisite-patch-id: 2623e1613e37cf92a13f5912053f216897d44e37
prerequisite-patch-id: a27017f12729000629e7397677468ec43d56b488
prerequisite-patch-id: 90be5a4db503b293b6e2aaa11b6626764f74c600
prerequisite-patch-id: 17987efb08b3f7882577822709ddf1b4b0a47f17
prerequisite-patch-id: 3a4a3de5953f1aa5adbe9d4d919d79360408bfcb
prerequisite-patch-id: 8c0177924a6a5ced7d097d1069de693a29bcd7fc
prerequisite-patch-id: 41a2390410768e2331b07b9806ccb7509828e2e5
prerequisite-patch-id: 847e46df5bbd0539b1324d628f601122728e025c
prerequisite-patch-id: e97641f63406d43924af801293e5d24ecd440ba8
prerequisite-patch-id: ce5a76f40d591a54631fc4caebf97bfe49d57ef8
prerequisite-patch-id: 74648a530be0081338cad49722eda0839c363455
prerequisite-patch-id: 44bcb8920c4cb56811943d0d51bf0de9fd363ac7

Best regards,
-- 
Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>

[PATCH 1/3] arm64: dts: mediatek: mt8195: Align ufshci node to dt-bindings changes

[Louis-Alexis Eyraud]

The MT8195 UFS host controller dt bindings now describe several extra
required clocks that were previously missing from clock description
and deprecates the freq-table-hz property use in favour of
operating-points-v2 instead.

So, add in ufshci node the rx_symbol clocks in clock list and replace
freq-table-hz property by operating-points-v2 one with a valid OPP
table.
Also reorder properties in node.

Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 35 ++++++++++++++++++++++----------
 1 file changed, 24 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 9aaf8b6edcb5..c859f4283388 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1472,8 +1472,7 @@ mmc2: mmc@11250000 {
 		ufshci: ufshci@11270000 {
 			compatible = "mediatek,mt8195-ufshci";
 			reg = <0 0x11270000 0 0x2300>;
-			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH 0>;
-			phys = <&ufsphy>;
+
 			clocks = <&infracfg_ao CLK_INFRA_AO_AES_UFSFDE>,
 				 <&infracfg_ao CLK_INFRA_AO_AES>,
 				 <&infracfg_ao CLK_INFRA_AO_UFS_TICK>,
@@ -1481,17 +1480,31 @@ ufshci: ufshci@11270000 {
 				 <&infracfg_ao CLK_INFRA_AO_UNIPRO_TICK>,
 				 <&infracfg_ao CLK_INFRA_AO_UFS_MP_SAP_B>,
 				 <&infracfg_ao CLK_INFRA_AO_UFS_TX_SYMBOL>,
-				 <&infracfg_ao CLK_INFRA_AO_PERI_UFS_MEM_SUB>;
-			clock-names = "ufs", "ufs_aes", "ufs_tick",
-					"unipro_sysclk", "unipro_tick",
-					"unipro_mp_bclk", "ufs_tx_symbol",
-					"ufs_mem_sub";
-			freq-table-hz = <0 0>, <0 0>, <0 0>,
-					<0 0>, <0 0>, <0 0>,
-					<0 0>, <0 0>;
-
+				 <&infracfg_ao CLK_INFRA_AO_PERI_UFS_MEM_SUB>,
+				 <&topckgen CLK_TOP_UFS_RX_SYMBOL>,
+				 <&topckgen CLK_TOP_UFS_RX_SYMBOL1>;
+			clock-names = "main", "aes", "tick", "unipro_sysclk",
+				      "unipro_tick", "unipro_mp_bclk",
+				      "tx_symbol", "mem_sub", "rx_symbol0",
+				      "rx_symbol1";
+			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH 0>;
+			operating-points-v2 = <&ufs_opp_table>;
+			phys = <&ufsphy>;
 			mediatek,ufs-disable-mcq;
 			status = "disabled";
+
+			ufs_opp_table: opp-table {
+				compatible = "operating-points-v2";
+
+				opp-26000000 {
+					opp-hz = /bits/ 64 <26000000>,
+						 /bits/ 64 <0>, /bits/ 64 <0>,
+						 /bits/ 64 <0>, /bits/ 64 <0>,
+						 /bits/ 64 <0>, /bits/ 64 <0>,
+						 /bits/ 64 <0>, /bits/ 64 <0>,
+						 /bits/ 64 <0>;
+				};
+			};
 		};
 
 		lvts_mcu: thermal-sensor@11278000 {

-- 
2.55.0

[PATCH 2/3] arm64: dts: mediatek: mt8395-genio-1200-evk-ufs: Complete UFS power supplies

[Louis-Alexis Eyraud]

The MT8195 UFS host controller dt binding now describes the power supplies
feeding the host controller, that were previously missing from supply
description.

So, add in the Mediatek Genio 1200-EVK board devicetree the regulators
used to power MT8395 UFS controller when the board is configured to use
its UFS storage as primary.

Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk-ufs.dts | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk-ufs.dts b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk-ufs.dts
index e09a3ecd8773..f3d839f31918 100644
--- a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk-ufs.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk-ufs.dts
@@ -16,6 +16,9 @@ / {
 
 &ufshci {
 	status = "okay";
+	avdd12-supply = <&mt6359_vrf12_ldo_reg>;
+	avdd12-ckbuf-supply = <&mt6359_vbbck_ldo_reg>;
+	avdd18-supply = <&mt6359_vio18_ldo_reg>;
 	vcc-supply = <&mt6359_vemc_1_ldo_reg>;
 	vccq2-supply = <&mt6359_vufs_ldo_reg>;
 };

-- 
2.55.0

[PATCH 3/3] arm64: dts: mediatek: mt8395-radxa-nio-12l: Complete UFS power supplies

[Louis-Alexis Eyraud]

The MT8195 UFS host controller dt binding now describes the power supplies
feeding the host controller, that were previously missing from supply
description.

So, add in the Radxa NIO-12L board devicetree the regulators used to
power MT8395 UFS controller on the board.

Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
index 9cf0315da035..7e9cabdd2825 100644
--- a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
@@ -1184,6 +1184,9 @@ &uart1 {
 };
 
 &ufshci {
+	avdd12-supply = <&mt6359_vrf12_ldo_reg>;
+	avdd12-ckbuf-supply = <&mt6359_vbbck_ldo_reg>;
+	avdd18-supply = <&mt6359_vio18_ldo_reg>;
 	vcc-supply = <&mt6359_vemc_1_ldo_reg>;
 	vccq2-supply = <&mt6359_vufs_ldo_reg>;
 	status = "okay";

-- 
2.55.0

Re: [PATCH 2/3] arm64: dts: mediatek: mt8395-genio-1200-evk-ufs: Complete UFS power supplies

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The patch introduces undocumented device tree properties (`avdd12-supply`, `avdd12-ckbuf-supply`, `avdd18-supply`) which are neither defined in the DT bindings nor parsed by the driver.
--

commit b5065cb681ea986f66b5cbd4f119cd47dc276eab
Author: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>

arm64: dts: mediatek: mt8395-genio-1200-evk-ufs: Complete UFS power supplies

This commit adds regulators used to power the MT8395 UFS controller to the
Genio 1200-EVK board devicetree.

> diff --git a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk-ufs.dts b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk-ufs.dts
> index e09a3ecd87730..f3d839f319187 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk-ufs.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk-ufs.dts
> @@ -16,6 +16,9 @@ / {
>  
>  &ufshci {
>  	status = "okay";
> +	avdd12-supply = <&mt6359_vrf12_ldo_reg>;
> +	avdd12-ckbuf-supply = <&mt6359_vbbck_ldo_reg>;
> +	avdd18-supply = <&mt6359_vio18_ldo_reg>;

[Severity: Medium]
Will these new properties trigger dtbs_check validation errors?

The mediatek,ufs.yaml binding specifies unevaluatedProperties: false and does
not define avdd12-supply, avdd12-ckbuf-supply, or avdd18-supply. These do not
appear in ufs-common.yaml either.

Additionally, since the kernel UFS and PHY drivers do not currently parse or
request regulators by these names, will these regulators remain unmanaged by
the UFS stack and potentially be powered off at runtime?

>  	vcc-supply = <&mt6359_vemc_1_ldo_reg>;
>  	vccq2-supply = <&mt6359_vufs_ldo_reg>;
>  };

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260902-mediatek-ufs-cleanup-dts-v1-0-7876e7a27a9d@collabora.com?part=2

Re: [PATCH 3/3] arm64: dts: mediatek: mt8395-radxa-nio-12l: Complete UFS power supplies

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Missing device tree bindings for newly introduced clocks and clock name changes in the UFS host controller node.
--

commit 7e580823437c359d26b9851536b0a8f497844243
Author: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>

arm64: dts: mediatek: mt8395-radxa-nio-12l: Complete UFS power supplies

The MT8195 UFS host controller dt binding now describes the power supplies
feeding the host controller, that were previously missing from supply
description. Add in the Radxa NIO-12L board devicetree the regulators used
to power MT8395 UFS controller on the board.

> diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
> index b279eed1bfc3a..325b1cc97862f 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
> @@ -1167,6 +1167,9 @@ &uart1 {
>  };
>  
>  &ufshci {
> +	avdd12-supply = <&mt6359_vrf12_ldo_reg>;

[Severity: Low]
Will running make dtbs_check on this updated device tree produce validation
errors for the ufshci node?

The mt8195.dtsi device tree was updated in this patchset (commit "arm64: dts:
mediatek: mt8195: Align ufshci node to dt-bindings changes") to use 10 clocks
with renamed clock-names instead of 8:

arch/arm64/boot/dts/mediatek/mt8195.dtsi:ufshci {
			clock-names = "main", "aes", "tick", "unipro_sysclk",
				      "unipro_tick", "unipro_mp_bclk",
				      "tx_symbol", "mem_sub", "rx_symbol0",
				      "rx_symbol1";
}

However, it appears the dt-binding schema in mediatek,ufs.yaml was not updated
in this tree to reflect these changes. The schema still strictly enforces a
maximum of 8 items and requires the old names.

Does the binding schema need to be updated alongside these device tree changes
to prevent dtbs_check failures?

> +	avdd12-ckbuf-supply = <&mt6359_vbbck_ldo_reg>;
> +	avdd18-supply = <&mt6359_vio18_ldo_reg>;
>  	vcc-supply = <&mt6359_vemc_1_ldo_reg>;
>  	vccq2-supply = <&mt6359_vufs_ldo_reg>;
>  	status = "okay";

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260902-mediatek-ufs-cleanup-dts-v1-0-7876e7a27a9d@collabora.com?part=3