Re: [PATCH v4 2/4] arm64: dts: intel: agilex5: add USB3.1 controller node

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The `usb31_bus` node maps a 40-bit (1 TiB) `dma-ranges` window into its parent bus (`soc@0`), but the parent has `#address-cells = <1>`, meaning it only supports a 32-bit (4 GiB) address space. This structurally overflows the parent's address capacity.
- [Medium] The `usb31` node uses an undocumented compatible string `altr,agilex5-dwc3` without providing a generic fallback (e.g., `snps,dwc3`).
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commit 8d2a3618a07e5a6f14a501007e87cb0d96e62264
Author: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>

arm64: dts: intel: agilex5: add USB3.1 controller node

This commit adds a DTS node for the Synopsys DWC3 USB3.1 controller on the
Agilex5 SoC. It places the controller under a simple-bus with a 40-bit
dma-ranges window to match the USB DMA address width of the interconnect.

> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index f54767d1526e1..523f722a2a642 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -493,6 +493,41 @@ usb0: usb@10b00000 {
>  			status = "disabled";
>  		};
>  
> +		usb31_bus: usb-bus@11000000 {
> +			compatible = "simple-bus";
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			ranges = <0x0 0x0 0x11000000 0x0 0x100000>;
> +			/*
> +			 * USB interconnect DMA is limited to 40-bit addresses
> +			 * (1 TiB window from 0).
> +			 */
> +			dma-ranges = <0x0 0x0 0x0 0x100 0x0>;

[Severity: High]
Does this dma-ranges mapping structurally overflow the parent bus's
addressing capabilities? The usb31_bus node maps a 40-bit (1 TiB) window
into its parent node (soc@0). However, the soc@0 parent sets
#address-cells = <1>, which only supports a 32-bit (4 GiB) address space.

Because of this mismatch, device tree parsing and DMA address translation
will fail or truncate for addresses beyond 4 GiB, as the 1 TiB translation
window mathematically exceeds the 32-bit maximum of the parent.

> +
> +			usb31: usb@0 {
> +				compatible = "altr,agilex5-dwc3";

[Severity: Medium]
Could this break device tree schema validation and backwards compatibility?
The compatible string "altr,agilex5-dwc3" doesn't provide a generic
fallback like "snps,dwc3".

Without a generic fallback string, older kernels without explicit support
for "altr,agilex5-dwc3" will completely fail to probe the generic DWC3
driver.

> +				reg = <0x0 0x0 0x0 0x100000>;
> +				interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1788503540.git.adrian.ho.yin.ng@altera.com?part=2