[PATCH v2 0/9] Add SpacemiT K1 USB2.0 controllers support

[PATCH v2 0/9] Add SpacemiT K1 USB2.0 controllers support

[Junzhong Pan]

The SpacemiT K1 SoC has two USB2.0 controllers, one has Dual-Role
support, but the hardware has no internal OTG registers, the other is
Host only. These controllers are compatible with Chipidea USB2 driver
with some flags set and reset control support.

This series is based on 7.3-rc1 and has been tested on Banana Pi F3
development board.

A self-powered USB device/hub is needed to test the host function of the
dual-role controller on Banana Pi F3, a MINI-PCIe USB2.0 module (a
cellular module e.g.) is needed to test the host only controller.

Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
---
Changes in v2:
- rebase on 7.3-rc1 and collect tags
- reorder the usbphy and usb nodes in k1-bananapi-f3
- add constraint for spacemit,k1-usb2 in dt-binding
- add OrangePi RV2 device-tree change
- use devm_clk_get_optional_enabled() for driver according to sashiko's advice
- Link to v1: https://lore.kernel.org/r/20260812-b4-spacemit-k1-usb2-v1-0-f28cf29e522b@linux.spacemit.com

---
Junzhong Pan (9):
      dt-bindings: usb: ci-hdrc-usb2: add spacemit,k1-usb2 compatible
      dt-bindings: usb: ci-hdrc-usb2: require clocks and resets for spacemit,k1-usb2
      usb: chipidea: usb2: use devm_clk_get_optional_enabled()
      usb: chipidea: usb2: add optional reset support
      usb: chipidea: usb2: add SpacemiT K1 support
      riscv: dts: spacemit: add USB2.0 controller nodes for K1
      riscv: dts: spacemit: enable USB2.0 controllers on BananaPi F3
      riscv: dts: spacemit: enable USB2.0 controllers on OrangePi RV2
      riscv: defconfig: enable ChipIdea USB controller support

 .../devicetree/bindings/usb/ci-hdrc-usb2.yaml      | 15 ++++++++
 arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts    | 16 +++++++++
 arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts   | 28 +++++++++++++++
 arch/riscv/boot/dts/spacemit/k1.dtsi               | 40 ++++++++++++++++++++++
 arch/riscv/configs/defconfig                       |  4 +++
 drivers/usb/chipidea/ci_hdrc_usb2.c                | 30 +++++++++-------
 6 files changed, 121 insertions(+), 12 deletions(-)
---
base-commit: cee9395acd8043be0644b25c34bfa86623f2b935
change-id: 20260812-b4-spacemit-k1-usb2-97adfc283d58

Best regards,
-- 
Junzhong Pan <panjunzhong@linux.spacemit.com>

[PATCH v2 1/9] dt-bindings: usb: ci-hdrc-usb2: add spacemit,k1-usb2 compatible

[Junzhong Pan]

The USB2.0 controller on the SpacemiT K1 SoC is dual-role capable but
has no internal OTG registers, this requires flags which disable
related features set in platform data. Add a compatible string to match
the platform data.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Ze Huang <huang.ze@linux.dev>
Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
---
 Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
index 620b564914d4..6f8d88a0681d 100644
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
@@ -25,6 +25,7 @@ properties:
           - nvidia,tegra124-udc
           - nxp,s32g2-usb
           - qcom,ci-hdrc
+          - spacemit,k1-usb2
       - items:
           - enum:
               - nvidia,tegra114-ehci

-- 
2.34.1

[PATCH v2 2/9] dt-bindings: usb: ci-hdrc-usb2: require clocks and resets for spacemit,k1-usb2

[Junzhong Pan]

Chipidea USB2 Controller on SpacemiT K1 requires 1 clock and 1 reset to
work, add constraints for it.

Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
---
 Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
index 6f8d88a0681d..5c2b7eb1a6ff 100644
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
@@ -114,6 +114,20 @@ allOf:
           maxItems: 2
         clock-names:
           maxItems: 2
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: spacemit,k1-usb2
+    then:
+      properties:
+        clocks:
+          maxItems: 1
+        resets:
+          minItems: 1
+      required:
+        - clocks
+        - resets
 
 unevaluatedProperties: false
 

-- 
2.34.1

Re: [PATCH v2 2/9] dt-bindings: usb: ci-hdrc-usb2: require clocks and resets for spacemit,k1-usb2

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 1189 bytes --]

On Tue, Sep 08, 2026 at 05:48:39PM +0800, Junzhong Pan wrote:
> Chipidea USB2 Controller on SpacemiT K1 requires 1 clock and 1 reset to
> work, add constraints for it.
> 
> Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>

Squash this into patch 1.

> ---
>  Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
> index 6f8d88a0681d..5c2b7eb1a6ff 100644
> --- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
> +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
> @@ -114,6 +114,20 @@ allOf:
>            maxItems: 2
>          clock-names:
>            maxItems: 2
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: spacemit,k1-usb2
> +    then:
> +      properties:
> +        clocks:
> +          maxItems: 1
> +        resets:
> +          minItems: 1
> +      required:
> +        - clocks
> +        - resets
>  
>  unevaluatedProperties: false
>  
> 
> -- 
> 2.34.1
> 

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH v2 2/9] dt-bindings: usb: ci-hdrc-usb2: require clocks and resets for spacemit,k1-usb2

[Junzhong Pan]

On 9/9/2026 1:50 AM, Conor Dooley wrote:
> On Tue, Sep 08, 2026 at 05:48:39PM +0800, Junzhong Pan wrote:
>> Chipidea USB2 Controller on SpacemiT K1 requires 1 clock and 1 reset to
>> work, add constraints for it.
>>
>> Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
> 
> Squash this into patch 1.

Ok, thanks

> 
>> ---
>>  Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml | 14 ++++++++++++++
>>  1 file changed, 14 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
>> index 6f8d88a0681d..5c2b7eb1a6ff 100644
>> --- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
>> +++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
>> @@ -114,6 +114,20 @@ allOf:
>>            maxItems: 2
>>          clock-names:
>>            maxItems: 2
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            const: spacemit,k1-usb2
>> +    then:
>> +      properties:
>> +        clocks:
>> +          maxItems: 1
>> +        resets:
>> +          minItems: 1
>> +      required:
>> +        - clocks
>> +        - resets
>>  
>>  unevaluatedProperties: false
>>  
>>
>> -- 
>> 2.34.1
>>

[PATCH v2 3/9] usb: chipidea: usb2: use devm_clk_get_optional_enabled()

[Junzhong Pan]

Convert devm_clk_get_optional() and clk_prepare_enable() into a single
call devm_clk_get_optional_enabled().

Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
---
 drivers/usb/chipidea/ci_hdrc_usb2.c | 17 ++++-------------
 1 file changed, 4 insertions(+), 13 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c
index 8ffa1e95d8e8..6fae2d4a053a 100644
--- a/drivers/usb/chipidea/ci_hdrc_usb2.c
+++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
@@ -70,15 +70,10 @@ static int ci_hdrc_usb2_probe(struct platform_device *pdev)
 	if (!priv)
 		return -ENOMEM;
 
-	priv->clk = devm_clk_get_optional(dev, NULL);
+	priv->clk = devm_clk_get_optional_enabled(dev, NULL);
 	if (IS_ERR(priv->clk))
-		return PTR_ERR(priv->clk);
-
-	ret = clk_prepare_enable(priv->clk);
-	if (ret) {
-		dev_err(dev, "failed to enable the clock: %d\n", ret);
-		return ret;
-	}
+		return dev_err_probe(dev, PTR_ERR(priv->clk),
+				     "failed to get or enable the clock\n");
 
 	ci_pdata->name = dev_name(dev);
 
@@ -90,7 +85,7 @@ static int ci_hdrc_usb2_probe(struct platform_device *pdev)
 			dev_err(dev,
 				"failed to register ci_hdrc platform device: %d\n",
 				ret);
-		goto clk_err;
+		return ret;
 	}
 
 	platform_set_drvdata(pdev, priv);
@@ -99,10 +94,6 @@ static int ci_hdrc_usb2_probe(struct platform_device *pdev)
 	pm_runtime_enable(dev);
 
 	return 0;
-
-clk_err:
-	clk_disable_unprepare(priv->clk);
-	return ret;
 }
 
 static void ci_hdrc_usb2_remove(struct platform_device *pdev)

-- 
2.34.1

Re: [PATCH v2 3/9] usb: chipidea: usb2: use devm_clk_get_optional_enabled()

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Double disable and unprepare of the clock during device removal.
--

commit d2e0018bd6f14cd49dfa6012d83048e3abde69f6
Author: Junzhong Pan <panjunzhong@linux.spacemit.com>

usb: chipidea: usb2: use devm_clk_get_optional_enabled()

Convert devm_clk_get_optional() and clk_prepare_enable() into a single
call devm_clk_get_optional_enabled().

> diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c
> index 8ffa1e95d8e86..6fae2d4a053a1 100644
> --- a/drivers/usb/chipidea/ci_hdrc_usb2.c
> +++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
[ ... ]
> @@ -99,10 +94,6 @@ static int ci_hdrc_usb2_probe(struct platform_device *pdev)
>  	pm_runtime_enable(dev);
>  
>  	return 0;
> -
> -clk_err:
> -	clk_disable_unprepare(priv->clk);
> -	return ret;
>  }
>  
>  static void ci_hdrc_usb2_remove(struct platform_device *pdev)

[Severity: High]
Does this conversion also require removing the manual cleanup in
ci_hdrc_usb2_remove()?

Since the clock is now managed by devm_clk_get_optional_enabled(), it will
automatically handle disabling and unpreparing the clock when the device
is removed. 

Leaving the manual clk_disable_unprepare(priv->clk) in ci_hdrc_usb2_remove():

static void ci_hdrc_usb2_remove(struct platform_device *pdev)
{
	struct ci_hdrc_usb2_priv *priv = platform_get_drvdata(pdev);

	pm_runtime_disable(&pdev->dev);
	ci_hdrc_remove_device(priv->ci_pdev);
	clk_disable_unprepare(priv->clk);
}

appears to result in a double disable and unprepare of the clock during
device removal, which could lead to unbalanced reference counts and trigger
kernel warnings.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260908-b4-spacemit-k1-usb2-v2-0-f07342ffa051@linux.spacemit.com?part=3

Re: [PATCH v2 3/9] usb: chipidea: usb2: use devm_clk_get_optional_enabled()

[Junzhong Pan]

On 9/8/2026 5:55 PM, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] Double disable and unprepare of the clock during device removal.
> --
> 
> commit d2e0018bd6f14cd49dfa6012d83048e3abde69f6
> Author: Junzhong Pan <panjunzhong@linux.spacemit.com>
> 
> usb: chipidea: usb2: use devm_clk_get_optional_enabled()
> 
> Convert devm_clk_get_optional() and clk_prepare_enable() into a single
> call devm_clk_get_optional_enabled().
> 
>> diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c
>> index 8ffa1e95d8e86..6fae2d4a053a1 100644
>> --- a/drivers/usb/chipidea/ci_hdrc_usb2.c
>> +++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
> [ ... ]
>> @@ -99,10 +94,6 @@ static int ci_hdrc_usb2_probe(struct platform_device *pdev)
>>  	pm_runtime_enable(dev);
>>  
>>  	return 0;
>> -
>> -clk_err:
>> -	clk_disable_unprepare(priv->clk);
>> -	return ret;
>>  }
>>  
>>  static void ci_hdrc_usb2_remove(struct platform_device *pdev)
> 
> [Severity: High]
> Does this conversion also require removing the manual cleanup in
> ci_hdrc_usb2_remove()?
> 
> Since the clock is now managed by devm_clk_get_optional_enabled(), it will
> automatically handle disabling and unpreparing the clock when the device
> is removed. 
> 
> Leaving the manual clk_disable_unprepare(priv->clk) in ci_hdrc_usb2_remove():
> 
> static void ci_hdrc_usb2_remove(struct platform_device *pdev)
> {
> 	struct ci_hdrc_usb2_priv *priv = platform_get_drvdata(pdev);
> 
> 	pm_runtime_disable(&pdev->dev);
> 	ci_hdrc_remove_device(priv->ci_pdev);
> 	clk_disable_unprepare(priv->clk);
> }
> 
> appears to result in a double disable and unprepare of the clock during
> device removal, which could lead to unbalanced reference counts and trigger
> kernel warnings.

Ok, I will fix this in v3. Thanks.

[PATCH v2 4/9] usb: chipidea: usb2: add optional reset support

[Junzhong Pan]

The USB2 controller of SpacemiT K1 SoC requires reset support, to keep
compatibility, add optional reset support.

Acked-by: Peter Chen <peter.chen@kernel.com>
Tested-by: Ze Huang <huang.ze@linux.dev>
Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
---
 drivers/usb/chipidea/ci_hdrc_usb2.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c
index 6fae2d4a053a..f81673edca3c 100644
--- a/drivers/usb/chipidea/ci_hdrc_usb2.c
+++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
@@ -12,6 +12,7 @@
 #include <linux/phy/phy.h>
 #include <linux/platform_device.h>
 #include <linux/property.h>
+#include <linux/reset.h>
 #include <linux/usb/chipidea.h>
 #include <linux/usb/hcd.h>
 #include <linux/usb/ulpi.h>
@@ -21,6 +22,7 @@
 struct ci_hdrc_usb2_priv {
 	struct platform_device	*ci_pdev;
 	struct clk		*clk;
+	struct reset_control	*reset;
 };
 
 static const struct ci_hdrc_platform_data ci_default_pdata = {
@@ -75,6 +77,11 @@ static int ci_hdrc_usb2_probe(struct platform_device *pdev)
 		return dev_err_probe(dev, PTR_ERR(priv->clk),
 				     "failed to get or enable the clock\n");
 
+	priv->reset = devm_reset_control_get_optional_exclusive_deasserted(dev, NULL);
+	if (IS_ERR(priv->reset))
+		return dev_err_probe(dev, PTR_ERR(priv->reset),
+				     "failed to get or deassert the reset control\n");
+
 	ci_pdata->name = dev_name(dev);
 
 	priv->ci_pdev = ci_hdrc_add_device(dev, pdev->resource,

-- 
2.34.1

Re: [PATCH v2 4/9] usb: chipidea: usb2: add optional reset support

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Double clock disable and hardware reset ordering issue in driver teardown.
--

commit 13027fbf78c576199d06490bac312974df846e8a
Author: Junzhong Pan <panjunzhong@linux.spacemit.com>

usb: chipidea: usb2: add optional reset support

This commit adds optional reset support for the USB2 controller on the 
SpacemiT K1 SoC to maintain hardware compatibility.

> diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c
> index 6fae2d4a053a1..f81673edca3c1 100644
> --- a/drivers/usb/chipidea/ci_hdrc_usb2.c
> +++ b/drivers/usb/chipidea/ci_hdrc_usb2.c

[ ... ]

> @@ -75,6 +77,11 @@ static int ci_hdrc_usb2_probe(struct platform_device *pdev)
>  		return dev_err_probe(dev, PTR_ERR(priv->clk),
>  				     "failed to get or enable the clock\n");
>  
> +	priv->reset = devm_reset_control_get_optional_exclusive_deasserted(dev, NULL);

[Severity: High]
Could adding this devm-managed reset trigger a hardware hang during driver
unbind?

Since ci_hdrc_usb2_remove() manually disables the clock:

ci_hdrc_usb2_remove() {
        ...
        clk_disable_unprepare(priv->clk);
}

Devres actions execute in reverse order (LIFO) after remove() completes, so
the hardware reset will be asserted automatically by devres after the clock
is already manually disabled. Asserting a reset synchronously without an
active clock can hang the bus or lock up the SoC on many platforms.

Additionally, since the clock was previously updated to be acquired using
devm_clk_get_optional_enabled(), the manual clk_disable_unprepare() in
remove() results in a double-disable of the clock when the device is unbound,
triggering clock framework warnings.

Does this require cleaning up the manual teardown in ci_hdrc_usb2_remove()
to ensure proper ordering?

> +	if (IS_ERR(priv->reset))
> +		return dev_err_probe(dev, PTR_ERR(priv->reset),
> +				     "failed to get or deassert the reset control\n");
> +
>  	ci_pdata->name = dev_name(dev);
>  
>  	priv->ci_pdev = ci_hdrc_add_device(dev, pdev->resource,

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260908-b4-spacemit-k1-usb2-v2-0-f07342ffa051@linux.spacemit.com?part=4

[PATCH v2 5/9] usb: chipidea: usb2: add SpacemiT K1 support

[Junzhong Pan]

Add a compatible for SpacemiT K1, and add platform data with correct
flag since the hardware doesn't have internal otg register support.

Acked-by: Peter Chen <peter.chen@kernel.org>
Tested-by: Ze Huang <huang.ze@linux.dev>
Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
---
 drivers/usb/chipidea/ci_hdrc_usb2.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c
index f81673edca3c..606ca367343f 100644
--- a/drivers/usb/chipidea/ci_hdrc_usb2.c
+++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
@@ -40,10 +40,18 @@ static const struct ci_hdrc_platform_data ci_zevio_pdata = {
 	.flags		= CI_HDRC_REGS_SHARED | CI_HDRC_FORCE_FULLSPEED,
 };
 
+static const struct ci_hdrc_platform_data ci_k1_pdata = {
+	.capoffset	= DEF_CAPOFFSET,
+	.flags		= CI_HDRC_DISABLE_STREAMING |
+			  CI_HDRC_FORCE_VBUS_ACTIVE_ALWAYS |
+			  CI_HDRC_DUAL_ROLE_NOT_OTG,
+};
+
 static const struct of_device_id ci_hdrc_usb2_of_match[] = {
 	{ .compatible = "chipidea,usb2" },
 	{ .compatible = "xlnx,zynq-usb-2.20a", .data = &ci_zynq_pdata },
 	{ .compatible = "lsi,zevio-usb", .data = &ci_zevio_pdata },
+	{ .compatible = "spacemit,k1-usb2", .data = &ci_k1_pdata },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);

-- 
2.34.1

Re: [PATCH v2 5/9] usb: chipidea: usb2: add SpacemiT K1 support

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:

Pre-existing issues:
- [High] Dynamic dual-role switching via `usb-role-switch` or `extcon` is completely broken when `CI_HDRC_DUAL_ROLE_NOT_OTG` is used.
- [Medium] Unsafe unconditional accesses to the OTGSC register on platforms without OTG registers.
--

commit 8804983329a666f72771103794460f9ba731c4b4
Author: Junzhong Pan <panjunzhong@linux.spacemit.com>

usb: chipidea: usb2: add SpacemiT K1 support

This commit adds a compatible string and platform data for the SpacemiT K1
USB2 controller. It configures the hardware with specific flags to account
for the lack of internal OTG register support.

> diff --git a/drivers/usb/chipidea/ci_hdrc_usb2.c b/drivers/usb/chipidea/ci_hdrc_usb2.c
> index f81673edca3c1..606ca367343f3 100644
> --- a/drivers/usb/chipidea/ci_hdrc_usb2.c
> +++ b/drivers/usb/chipidea/ci_hdrc_usb2.c
> @@ -40,10 +40,18 @@ static const struct ci_hdrc_platform_data ci_zevio_pdata = {
>  	.flags		= CI_HDRC_REGS_SHARED | CI_HDRC_FORCE_FULLSPEED,
>  };
>  
> +static const struct ci_hdrc_platform_data ci_k1_pdata = {
> +	.capoffset	= DEF_CAPOFFSET,
> +	.flags		= CI_HDRC_DISABLE_STREAMING |
> +			  CI_HDRC_FORCE_VBUS_ACTIVE_ALWAYS |
> +			  CI_HDRC_DUAL_ROLE_NOT_OTG,

[Severity: Medium]
This isn't a bug introduced by this patch, but this flag configuration
exposes a pre-existing flaw in the core driver. Can the K1 SoC bus fabric
generate a slave error for accesses to unimplemented registers within the
USB IP?

During a USB resume following a wakeup event, ci_controller_resume()
unconditionally calls ci_extcon_wakeup_int(), which does a blind read to the
unsupported OTGSC register:

drivers/usb/chipidea/core.c:ci_extcon_wakeup_int() {
        ...
        u32 otgsc = hw_read_otgsc(ci, ~0);
        ...
}

Similarly, if power is lost during suspend while in host mode,
ci_power_lost_work() calls ci_handle_id_switch(), which unconditionally
calls ci_otg_role(), resulting in another read of OTGSC.

If the K1 hardware generates an access fault instead of returning 0 for
unimplemented register reads, could this cause a synchronous load access
fault on resume or wakeup?

[Severity: High]
This is a pre-existing issue, but does dynamic dual-role switching work on
this hardware when using this flag?

The CI_HDRC_DUAL_ROLE_NOT_OTG flag forces ci->is_otg to be false. However,
the role switch framework relies on ci_irq() to process changes. Looking at
ci_irq_handler(), the entire extcon and OTG event processing block is gated
by a check for ci->is_otg:

drivers/usb/chipidea/core.c:ci_irq_handler() {
        ...
        if (ci->is_otg) {
                otgsc = hw_read_otgsc(ci, ~0);
        ...
}

If a Type-C controller or extcon driver invokes usb_role_switch_set() or
ci_cable_notifier(), both call ci_irq(). Since ci->is_otg is false, will
these events be silently ignored by the handler, leaving the port stuck in
its default role despite the standard kernel APIs being registered?

> +};
> +
>  static const struct of_device_id ci_hdrc_usb2_of_match[] = {
>  	{ .compatible = "chipidea,usb2" },
>  	{ .compatible = "xlnx,zynq-usb-2.20a", .data = &ci_zynq_pdata },
>  	{ .compatible = "lsi,zevio-usb", .data = &ci_zevio_pdata },
> +	{ .compatible = "spacemit,k1-usb2", .data = &ci_k1_pdata },
>  	{ }
>  };
>  MODULE_DEVICE_TABLE(of, ci_hdrc_usb2_of_match);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260908-b4-spacemit-k1-usb2-v2-0-f07342ffa051@linux.spacemit.com?part=5

Re: [PATCH v2 5/9] usb: chipidea: usb2: add SpacemiT K1 support

[Troy Mitchell]

[-- Attachment #1: Type: text/plain, Size: 445 bytes --]

On Tue Sep 8, 2026 at 5:48 PM +08, Junzhong Pan wrote:
> Add a compatible for SpacemiT K1, and add platform data with correct
> flag since the hardware doesn't have internal otg register support.
>
> Acked-by: Peter Chen <peter.chen@kernel.org>
> Tested-by: Ze Huang <huang.ze@linux.dev>
> Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>

-- 
Troy Mitchell


[-- Attachment #2: signature.asc --]
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[PATCH v2 6/9] riscv: dts: spacemit: add USB2.0 controller nodes for K1

[Junzhong Pan]

The SpacemiT K1 SoC has two ChipIdea USB2.0 controllers.
- USB2.0 Dual-Role
- usb2.0 Host Only

Add the controller and PHY nodes.

Tested-by: Ze Huang <huang.ze@linux.dev>
Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
---
 arch/riscv/boot/dts/spacemit/k1.dtsi | 40 ++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index 3fabfd34114b..22896e757dbb 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -459,6 +459,22 @@ syscon_rcpu2: system-controller@c0888000 {
 			#reset-cells = <1>;
 		};
 
+		usbphy0: phy@c0940000 {
+			compatible = "spacemit,k1-usb2-phy";
+			reg = <0x0 0xc0940000 0x0 0x200>;
+			clocks = <&syscon_apmu CLK_USB_AXI>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		usbphy1: phy@c09c0000 {
+			compatible = "spacemit,k1-usb2-phy";
+			reg = <0x0 0xc09c0000 0x0 0x200>;
+			clocks = <&syscon_apmu CLK_USB_P1>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
 		usbphy2: phy@c0a30000 {
 			compatible = "spacemit,k1-usb2-phy";
 			reg = <0x0 0xc0a30000 0x0 0x200>;
@@ -1301,6 +1317,30 @@ storage-bus {
 			#size-cells = <2>;
 			dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
 
+			usb2_0: usb@c0900000 {
+				compatible = "spacemit,k1-usb2";
+				reg = <0x0 0xc0900000 0x0 0x4100>;
+				interrupts = <105>;
+				clocks = <&syscon_apmu CLK_USB_AXI>;
+				resets = <&syscon_apmu RESET_USB_AXI>;
+				phys = <&usbphy0>;
+				phy-names = "usb-phy";
+				dr_mode = "otg";
+				status = "disabled";
+			};
+
+			usb2_1: usb@c0980000 {
+				compatible = "spacemit,k1-usb2";
+				reg = <0x0 0xc0980000 0x0 0x4100>;
+				interrupts = <118>;
+				clocks = <&syscon_apmu CLK_USB_P1>;
+				resets = <&syscon_apmu RESET_USBP1_AXI>;
+				phys = <&usbphy1>;
+				phy-names = "usb-phy";
+				dr_mode = "host";
+				status = "disabled";
+			};
+
 			usb_dwc3: usb@c0a00000 {
 				compatible = "spacemit,k1-dwc3";
 				reg = <0x0 0xc0a00000 0x0 0x10000>;

-- 
2.34.1

Re: [PATCH v2 6/9] riscv: dts: spacemit: add USB2.0 controller nodes for K1

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] The `storage-bus` device tree node lacks a `dma-ranges` mapping to system RAM, which breaks DMA functionality for the newly added USB2.0 controllers.
--

commit 45555a07cc8ff1f0aa27f21fd3042e46e3d7b6eb
Author: Junzhong Pan <panjunzhong@linux.spacemit.com>

riscv: dts: spacemit: add USB2.0 controller nodes for K1

This commit adds the ChipIdea USB2.0 controller and PHY nodes for the
SpacemiT K1 SoC. It includes configurations for both a Dual-Role and a
Host-Only controller.

> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
> index 3fabfd34114b2..22896e757dbb5 100644
> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi
> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
[ ... ]
> @@ -1301,6 +1317,30 @@ storage-bus {
>  			#size-cells = <2>;
>  			dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
>  
> +			usb2_0: usb@c0900000 {
> +				compatible = "spacemit,k1-usb2";

[Severity: High]
This isn't a bug introduced by this patch, but placing these new DMA masters
into the storage-bus node exposes a pre-existing flaw in the bus's
dma-ranges configuration.

The parent storage-bus defines its dma-ranges as restricting DMA to
physical addresses between 0x0 and 0x7FFFFFFF (MMIO space). However,
system RAM starts at 4GB (0x100000000).

Will this prevent the newly added ChipIdea USB2.0 controllers from functioning?
Because there is no reachable RAM mapped in the parent bus, the generic DMA
framework will limit the USB controllers' bus_dma_limit to 0x7FFFFFFF,
causing DMA map operations or SWIOTLB allocations to fail when probing the
driver or triggering data transfers.

> +				reg = <0x0 0xc0900000 0x0 0x4100>;
> +				interrupts = <105>;
[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260908-b4-spacemit-k1-usb2-v2-0-f07342ffa051@linux.spacemit.com?part=6

[PATCH v2 7/9] riscv: dts: spacemit: enable USB2.0 controllers on BananaPi F3

[Junzhong Pan]

On BananaPi F3, usb2_0 is connected to a Type-C connector at device
mode by default. This port have no VBUS supply capability, thus host
mode only works with self-powered device or hub. User could switch the
role in sysfs.

And the usb2_1 is connected to the USB2.0 pins of the Mini PCIe slot to
support cellular modules.

Tested-by: Ze Huang <huang.ze@linux.dev>
Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
---
 arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
index 58035d886bf6..ce36250e2deb 100644
--- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
@@ -383,10 +383,26 @@ &uart0 {
 	status = "okay";
 };
 
+&usbphy0 {
+	status = "okay";
+};
+
+&usbphy1 {
+	status = "okay";
+};
+
 &usbphy2 {
 	status = "okay";
 };
 
+&usb2_0 {
+	status = "okay";
+};
+
+&usb2_1 {
+	status = "okay";
+};
+
 &usb_dwc3 {
 	dr_mode = "host";
 	#address-cells = <1>;

-- 
2.34.1

Re: [PATCH v2 7/9] riscv: dts: spacemit: enable USB2.0 controllers on BananaPi F3

[Troy Mitchell]

[-- Attachment #1: Type: text/plain, Size: 596 bytes --]

On Tue Sep 8, 2026 at 5:48 PM +08, Junzhong Pan wrote:
> On BananaPi F3, usb2_0 is connected to a Type-C connector at device
> mode by default. This port have no VBUS supply capability, thus host
> mode only works with self-powered device or hub. User could switch the
> role in sysfs.
>
> And the usb2_1 is connected to the USB2.0 pins of the Mini PCIe slot to
> support cellular modules.
>
> Tested-by: Ze Huang <huang.ze@linux.dev>
> Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>

-- 
Troy Mitchell


[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 248 bytes --]

[PATCH v2 8/9] riscv: dts: spacemit: enable USB2.0 controllers on OrangePi RV2

[Junzhong Pan]

On OrangePi RV2, usb2_0 is connected to a Type-A connector at host
mode, its vbus output is controlled by gpio 126. And the usb2_1 is
connected to the USB2.0 connector pins onboard.

Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
---
 arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 28 ++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
index b907a1396b21..32d1aafc88f7 100644
--- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
@@ -64,6 +64,16 @@ vcc5v0_usb30: regulator-vcc5v0-usb30 {
 		vin-supply = <&vcc_5v0>;
 	};
 
+	vcc5v0_usb20: regulator-vcc5v0-usb20 {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpios = <&gpio K1_GPIO(126) GPIO_ACTIVE_HIGH>;
+		regulator-name = "vcc5v0_usb20";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc_5v0>;
+	};
+
 	leds {
 		compatible = "gpio-leds";
 
@@ -341,10 +351,28 @@ &uart0 {
 	status = "okay";
 };
 
+&usbphy0 {
+	status = "okay";
+};
+
+&usbphy1 {
+	status = "okay";
+};
+
 &usbphy2 {
 	status = "okay";
 };
 
+&usb2_0 {
+	vbus-supply = <&vcc5v0_usb20>;
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usb2_1 {
+	status = "okay";
+};
+
 &usb_dwc3 {
 	dr_mode = "host";
 	#address-cells = <1>;

-- 
2.34.1

Re: [PATCH v2 8/9] riscv: dts: spacemit: enable USB2.0 controllers on OrangePi RV2

[Ze Huang]

On Tue Sep 8, 2026 at 5:48 PM CST, Junzhong Pan wrote:
> On OrangePi RV2, usb2_0 is connected to a Type-A connector at host
> mode, its vbus output is controlled by gpio 126. And the usb2_1 is
> connected to the USB2.0 connector pins onboard.
>
> Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
> ---
>  arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 28 ++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> index b907a1396b21..32d1aafc88f7 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> +++ b/arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts
> @@ -64,6 +64,16 @@ vcc5v0_usb30: regulator-vcc5v0-usb30 {
>  		vin-supply = <&vcc_5v0>;
>  	};
>  
> +	vcc5v0_usb20: regulator-vcc5v0-usb20 {
> +		compatible = "regulator-fixed";
> +		enable-active-high;
> +		gpios = <&gpio K1_GPIO(126) GPIO_ACTIVE_HIGH>;
> +		regulator-name = "vcc5v0_usb20";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		vin-supply = <&vcc_5v0>;
> +	};
> +
>  	leds {
>  		compatible = "gpio-leds";
>  
> @@ -341,10 +351,28 @@ &uart0 {
>  	status = "okay";
>  };
>  
> +&usbphy0 {
> +	status = "okay";
> +};
> +
> +&usbphy1 {
> +	status = "okay";
> +};
> +
>  &usbphy2 {
>  	status = "okay";
>  };
>  
> +&usb2_0 {
> +	vbus-supply = <&vcc5v0_usb20>;
> +	dr_mode = "host";
> +	status = "okay";
> +};
> +
> +&usb2_1 {
> +	status = "okay";
> +};
> +
>  &usb_dwc3 {
>  	dr_mode = "host";
>  	#address-cells = <1>;


Works fine on rv2, thanks!

Tested-by: Ze Huang <huang.ze@linux.dev>

[PATCH v2 9/9] riscv: defconfig: enable ChipIdea USB controller support

[Junzhong Pan]

Enable the ChipIdea USB2 controller and SpacemiT K1 USB2 PHY to support
USB2.0 controllers on the SpacemiT K1 SoC.

Tested-by: Ze Huang <huang.ze@linux.dev>
Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
---
 arch/riscv/configs/defconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 04ae305d5511..5b556488de66 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -222,6 +222,9 @@ CONFIG_USB_CDNS3_HOST=y
 CONFIG_USB_CDNS3_STARFIVE=m
 CONFIG_USB_MUSB_HDRC=m
 CONFIG_USB_MUSB_SUNXI=m
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
 CONFIG_NOP_USB_XCEIV=m
 CONFIG_USB_GADGET=y
 CONFIG_USB_CONFIGFS=m
@@ -272,6 +275,7 @@ CONFIG_PWM=y
 CONFIG_PWM_PXA=m
 CONFIG_THEAD_C900_ACLINT_SSWI=y
 CONFIG_PHY_SUN4I_USB=m
+CONFIG_PHY_SPACEMIT_K1_USB2=y
 CONFIG_PHY_STARFIVE_JH7110_DPHY_RX=m
 CONFIG_PHY_STARFIVE_JH7110_PCIE=m
 CONFIG_PHY_STARFIVE_JH7110_USB=m

-- 
2.34.1

Re: [PATCH v2 9/9] riscv: defconfig: enable ChipIdea USB controller support

[Yixun Lan]

Hi Junzhong,

On 17:48 Tue 08 Sep     , Junzhong Pan wrote:
> Enable the ChipIdea USB2 controller and SpacemiT K1 USB2 PHY to support
> USB2.0 controllers on the SpacemiT K1 SoC.
> 
> Tested-by: Ze Huang <huang.ze@linux.dev>
> Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
> ---
>  arch/riscv/configs/defconfig | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 04ae305d5511..5b556488de66 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -222,6 +222,9 @@ CONFIG_USB_CDNS3_HOST=y
>  CONFIG_USB_CDNS3_STARFIVE=m
>  CONFIG_USB_MUSB_HDRC=m
>  CONFIG_USB_MUSB_SUNXI=m
> +CONFIG_USB_CHIPIDEA=y
> +CONFIG_USB_CHIPIDEA_UDC=y
> +CONFIG_USB_CHIPIDEA_HOST=y
I know some prefer to enable as loadable module for non major drivers
so, can you check if it works as module? and alter the config

>  CONFIG_NOP_USB_XCEIV=m
>  CONFIG_USB_GADGET=y
>  CONFIG_USB_CONFIGFS=m
> @@ -272,6 +275,7 @@ CONFIG_PWM=y
>  CONFIG_PWM_PXA=m
>  CONFIG_THEAD_C900_ACLINT_SSWI=y
>  CONFIG_PHY_SUN4I_USB=m
> +CONFIG_PHY_SPACEMIT_K1_USB2=y
>  CONFIG_PHY_STARFIVE_JH7110_DPHY_RX=m
>  CONFIG_PHY_STARFIVE_JH7110_PCIE=m
>  CONFIG_PHY_STARFIVE_JH7110_USB=m
> 
> -- 
> 2.34.1
> 

-- 
Yixun Lan (dlan)

Re: [PATCH v2 9/9] riscv: defconfig: enable ChipIdea USB controller support

[Junzhong Pan]

On 9/9/2026 6:07 AM, Yixun Lan wrote:
> Hi Junzhong,
> 
> On 17:48 Tue 08 Sep     , Junzhong Pan wrote:
>> Enable the ChipIdea USB2 controller and SpacemiT K1 USB2 PHY to support
>> USB2.0 controllers on the SpacemiT K1 SoC.
>>
>> Tested-by: Ze Huang <huang.ze@linux.dev>
>> Signed-off-by: Junzhong Pan <panjunzhong@linux.spacemit.com>
>> ---
>>  arch/riscv/configs/defconfig | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>> index 04ae305d5511..5b556488de66 100644
>> --- a/arch/riscv/configs/defconfig
>> +++ b/arch/riscv/configs/defconfig
>> @@ -222,6 +222,9 @@ CONFIG_USB_CDNS3_HOST=y
>>  CONFIG_USB_CDNS3_STARFIVE=m
>>  CONFIG_USB_MUSB_HDRC=m
>>  CONFIG_USB_MUSB_SUNXI=m
>> +CONFIG_USB_CHIPIDEA=y
>> +CONFIG_USB_CHIPIDEA_UDC=y
>> +CONFIG_USB_CHIPIDEA_HOST=y
> I know some prefer to enable as loadable module for non major drivers
> so, can you check if it works as module? and alter the config
> 

Okay, if it works, I will alter those to =m in v3. Thanks

>>  CONFIG_NOP_USB_XCEIV=m
>>  CONFIG_USB_GADGET=y
>>  CONFIG_USB_CONFIGFS=m
>> @@ -272,6 +275,7 @@ CONFIG_PWM=y
>>  CONFIG_PWM_PXA=m
>>  CONFIG_THEAD_C900_ACLINT_SSWI=y
>>  CONFIG_PHY_SUN4I_USB=m
>> +CONFIG_PHY_SPACEMIT_K1_USB2=y
>>  CONFIG_PHY_STARFIVE_JH7110_DPHY_RX=m
>>  CONFIG_PHY_STARFIVE_JH7110_PCIE=m
>>  CONFIG_PHY_STARFIVE_JH7110_USB=m
>>
>> -- 
>> 2.34.1
>>
>