From: Krzysztof Kozlowski <krzk@kernel.org>
To: David Oberhollenzer <david.oberhollenzer@sigma-star.at>
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, vkoul@kernel.org,
neil.armstrong@linaro.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, johan@kernel.org, rogerq@ti.com,
Julian.FRIEDRICH@frequentis.com, upstream+omap@sigma-star.at
Subject: Re: [PATCH v3 1/2] dt-bindings: phy: ti,phy-usb3: Add aspcie reference clock setting
Date: Wed, 9 Sep 2026 09:36:18 +0200 [thread overview]
Message-ID: <20260909-cherubic-exceptional-hummingbird-27b14c@quoll> (raw)
In-Reply-To: <20260905211555.15944-2-david.oberhollenzer@sigma-star.at>
On Sat, Sep 05, 2026 at 11:15:54PM +0200, David Oberhollenzer wrote:
> + not:
> + properties:
> + compatible:
> + contains:
> + const: ti,phy-pipe3-pcie
> + then:
> + properties:
> + ti,syscon-acspcie-tx-rx: false
>
> required:
> - reg
> @@ -135,4 +158,19 @@ examples:
> syscon-pllreset = <&scm_conf 0x3fc>;
> #phy-cells = <0>;
> };
> +
> + - |
> + /* TI PIPE3 PCIE PHY */
> + pcie-phy@4a0a4000 {
There are already two examples, so we usually do not need a third one
for difference in one property.
Drop, with this change:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-09-09 7:36 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-05 21:15 [PATCH v3 0/2] phy: ti: ti-pipe3: allow configuring ACSPCIe TX/RX mode David Oberhollenzer
2026-09-05 21:15 ` [PATCH v3 1/2] dt-bindings: phy: ti,phy-usb3: Add aspcie reference clock setting David Oberhollenzer
2026-09-09 7:36 ` Krzysztof Kozlowski [this message]
2026-09-05 21:15 ` [PATCH v3 2/2] phy: ti: ti-pipe3: allow configuring ACSPCIe TX/RX mode David Oberhollenzer
2026-09-05 21:23 ` sashiko-bot
2026-09-09 7:37 ` Krzysztof Kozlowski
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