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From: Krzysztof Kozlowski <krzk@kernel.org>
To: David Oberhollenzer <david.oberhollenzer@sigma-star.at>
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	 linux-kernel@vger.kernel.org, vkoul@kernel.org,
	neil.armstrong@linaro.org, robh@kernel.org,  krzk+dt@kernel.org,
	conor+dt@kernel.org, johan@kernel.org, rogerq@ti.com,
	 Julian.FRIEDRICH@frequentis.com, upstream+omap@sigma-star.at
Subject: Re: [PATCH v3 2/2] phy: ti: ti-pipe3: allow configuring ACSPCIe TX/RX mode
Date: Wed, 9 Sep 2026 09:37:55 +0200	[thread overview]
Message-ID: <20260909-hot-snobbish-cobra-0f97c5@quoll> (raw)
In-Reply-To: <20260905211555.15944-3-david.oberhollenzer@sigma-star.at>

On Sat, Sep 05, 2026 at 11:15:55PM +0200, David Oberhollenzer wrote:
> For the PCIe PHYs, read the property from the device tree and
> update the RX/TX mode selection bits in the specified syscon
> register.
> 
> Signed-off-by: David Oberhollenzer <david.oberhollenzer@sigma-star.at>
> ---
>  drivers/phy/ti/phy-ti-pipe3.c | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/drivers/phy/ti/phy-ti-pipe3.c b/drivers/phy/ti/phy-ti-pipe3.c
> index b5543b5c674c..bc02010dadb7 100644
> --- a/drivers/phy/ti/phy-ti-pipe3.c
> +++ b/drivers/phy/ti/phy-ti-pipe3.c
> @@ -115,6 +115,9 @@
>  #define MEM_CDR_LOS_SOURCE_MASK		GENMASK(10, 9)
>  #define MEM_CDR_LOS_SOURCE_SHIFT	9
>  
> +#define PCIE_TX_RX_CTRL_MASK		GENMASK(17, 16)
> +#define PCIE_TX_RX_CTRL_SHIFT		16
> +
>  /*
>   * This is an Empirical value that works, need to confirm the actual
>   * value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
> @@ -785,6 +788,24 @@ static int ti_pipe3_get_pll_base(struct ti_pipe3 *phy)
>  	return PTR_ERR_OR_ZERO(phy->pll_ctrl_base);
>  }
>  
> +static int ti_pipe3_acspcie_tx_rx_mode(struct ti_pipe3 *phy)
> +{
> +	struct device_node *np = phy->dev->of_node;
> +	struct regmap *regmap;
> +	unsigned int args[2];
> +
> +	regmap = syscon_regmap_lookup_by_phandle_args(np,
> +						      "ti,syscon-acspcie-tx-rx",
> +						      2, args);
> +	if (IS_ERR(regmap)) {
> +		dev_warn(phy->dev, "can't get ti,syscon-acspcie-tx-rx\n");
> +		return -EINVAL;
> +	}
> +
> +	return regmap_update_bits(regmap, args[0], PCIE_TX_RX_CTRL_MASK,
> +				  args[1] << PCIE_TX_RX_CTRL_SHIFT);
> +}
> +
>  static int ti_pipe3_probe(struct platform_device *pdev)
>  {
>  	struct ti_pipe3 *phy;
> @@ -807,6 +828,12 @@ static int ti_pipe3_probe(struct platform_device *pdev)
>  	phy->dpll_map = data->dpll_map;
>  	phy->settings = data->settings;
>  
> +	if (phy->mode == PIPE3_MODE_PCIE) {
> +		ret = ti_pipe3_acspcie_tx_rx_mode(phy);
> +		if (ret)
> +			dev_warn(dev, "failed to set ACSPCIe TX/RX mode\n");

This looks like new warning for existing ABI without any explanation why
is this a warning. Was it working? If yes, why existing boards should
warn now?

Best regards,
Krzysztof


      parent reply	other threads:[~2026-09-09  7:37 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-05 21:15 [PATCH v3 0/2] phy: ti: ti-pipe3: allow configuring ACSPCIe TX/RX mode David Oberhollenzer
2026-09-05 21:15 ` [PATCH v3 1/2] dt-bindings: phy: ti,phy-usb3: Add aspcie reference clock setting David Oberhollenzer
2026-09-09  7:36   ` Krzysztof Kozlowski
2026-09-05 21:15 ` [PATCH v3 2/2] phy: ti: ti-pipe3: allow configuring ACSPCIe TX/RX mode David Oberhollenzer
2026-09-05 21:23   ` sashiko-bot
2026-09-09  7:37   ` Krzysztof Kozlowski [this message]

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