From: sashiko-bot@kernel.org
To: "Petko Manolov" <petko.manolov@konsulko.com>
Cc: devicetree@vger.kernel.org, conor+dt@kernel.org, robh@kernel.org
Subject: Re: [PATCH v3 3/3] Add socfpga devicetree for Draeger's M48 board.
Date: Wed, 09 Sep 2026 11:25:40 +0000 [thread overview]
Message-ID: <20260909112540.7C7F71F00A3E@smtp.kernel.org> (raw)
In-Reply-To: <20260909111513.2259643-4-petko.manolov@konsulko.com>
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Low] The 'bank-name' property violates the device tree schema for 'snps,dw-apb-gpio-port' child nodes.
- [Low] Use of deprecated `snps,nr-gpios` property.
- [Low] Deprecated explicit `name` property in the memory node.
--
commit c5c8260180405203e51bdeb09506abe3c2c76c4d
Author: Petko Manolov <petko.manolov@konsulko.com>
Add socfpga devicetree for Draeger's M48 board.
This commit introduces a new devicetree for the Draeger M48 board based on
the Cyclone V SoC. It sets up the necessary nodes for various peripherals
including GPIO, GMAC, I2C, and QSPI.
> diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts
> new file mode 100644
> index 0000000000000..6c5a8013d40c7
> --- /dev/null
> +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts
> @@ -0,0 +1,129 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2020 Draeger and Licensors, info@draeger.com
> + */
> +#include "socfpga_cyclone5.dtsi"
> +
> +/ {
> + model = "Draeger M48 Cyclone V SoC";
> + compatible = "draeger,M48", "altr,socfpga-cyclone5", "altr,socfpga";
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory@0 {
> + name = "memory";
[Severity: Low]
Is it necessary to explicitly define the name property here? The Devicetree
Specification deprecates explicit name properties, as node names are
automatically derived from the node identifier. Its inclusion will trigger dtc
warnings during the build.
> + device_type = "memory";
> + reg = <0x0 0x40000000>;
> +
> + /* 1GB */
> + };
> +
> + aliases {
[ ... ]
> + soc {
> + gpio3: gpio@ff202000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dw-apb-gpio";
> + reg = <0xff202000 0x20>;
> + status = "okay";
> +
> + portd: gpio-controller@0 {
> + compatible = "snps,dw-apb-gpio-port";
> + gpio-controller;
> + #gpio-cells = <2>;
> + snps,nr-gpios = <2>;
[Severity: Low]
Could this use the standard ngpios property instead? The snps,nr-gpios
property is explicitly marked as deprecated in the snps,dw-apb-gpio.yaml
binding, and using it might trigger validation warnings.
> + reg = <0>;
> + bank-name = "SYNC_I";
[Severity: Low]
Will this property cause a device tree schema validation failure? The
snps,dw-apb-gpio-port binding enforces additionalProperties: false and does
not define bank-name. Running make dtbs_check will likely report a warning
here.
> + };
> + };
> +
> + gpio4: gpio@ff202020 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dw-apb-gpio";
> + reg = <0xff202020 0x20>;
> + status = "okay";
> +
> + porte: gpio-controller@0 {
> + compatible = "snps,dw-apb-gpio-port";
> + gpio-controller;
> + #gpio-cells = <2>;
> + snps,nr-gpios = <2>;
[Severity: Low]
Could this also use the standard ngpios property instead, as the snps,nr-gpios
property is deprecated?
> + reg = <0>;
> + bank-name = "SYNC_O";
[Severity: Low]
Will this property cause a device tree schema validation failure for the porte
node? The snps,dw-apb-gpio-port binding does not define bank-name and enforces
additionalProperties: false.
> + };
> + };
> + };
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260909111513.2259643-1-petko.manolov@konsulko.com?part=3
next prev parent reply other threads:[~2026-09-09 11:25 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-09 11:15 [PATCH v3 0/3] ARM: dts: draeger: Add socfpga devicetree for Draeger's M48 board Petko Manolov
2026-09-09 11:15 ` [PATCH v3 1/3] Add Draeger AG as a vendor Petko Manolov
2026-09-10 8:54 ` Krzysztof Kozlowski
2026-09-09 11:15 ` [PATCH v3 2/3] Add Draeger's M48 board to the SoCFPGA family Petko Manolov
2026-09-10 8:55 ` Krzysztof Kozlowski
2026-09-09 11:15 ` [PATCH v3 3/3] Add socfpga devicetree for Draeger's M48 board Petko Manolov
2026-09-09 11:25 ` sashiko-bot [this message]
2026-09-09 13:36 ` Dinh Nguyen
2026-09-11 9:25 ` Petko Manolov
2026-09-11 9:54 ` Dinh Nguyen
2026-09-11 10:10 ` Petko Manolov
2026-09-10 8:56 ` Krzysztof Kozlowski
2026-09-09 13:27 ` [PATCH v3 0/3] ARM: dts: draeger: " Dinh Nguyen
2026-09-11 9:21 ` Petko Manolov
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