From: sashiko-bot@kernel.org
To: "Krishna Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>
Cc: olteanv@gmail.com, vkoul@kernel.org,
linux-phy@lists.infradead.org, conor+dt@kernel.org,
devicetree@vger.kernel.org, robh@kernel.org,
neil.armstrong@linaro.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v3 1/5] dt-bindings: phy: qcom: add Nord QMP PCIe PHY binding
Date: Wed, 09 Sep 2026 11:53:59 +0000 [thread overview]
Message-ID: <20260909115400.129931F00A3D@smtp.kernel.org> (raw)
In-Reply-To: <20260909-nord-v3-1-b0a82721c547@oss.qualcomm.com>
> Document the PCIe PHY found on the Qualcomm Nord platform.
>
> Nord has a Gen5-capable QMP PCIe PHY that can operate in multiple
> lane configurations using four PHY segments (A/B/C/D). The active
> topology is selected by firmware through a TCSR configuration
> register and may be configured as x16, x8+x8, x8+x4+x4, or
> x8+x4+x2+x2.
>
> The binding describes the register regions, clocks, resets, power
> domains, regulators, PHY provider interface, clock provider interface,
> and the qcom,link-mode property used by the driver to discover the
> active lane configuration programmed by firmware.
>
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260909-nord-v3-0-b0a82721c547@oss.qualcomm.com?part=1
next prev parent reply other threads:[~2026-09-09 11:54 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-09 11:48 [PATCH v3 0/5] Add PCIe support for Qualcomm Nord platform Krishna Chaitanya Chundru
2026-09-09 11:48 ` [PATCH v3 1/5] dt-bindings: phy: qcom: add Nord QMP PCIe PHY binding Krishna Chaitanya Chundru
2026-09-09 11:53 ` sashiko-bot [this message]
2026-09-10 6:43 ` Shawn Guo
2026-09-10 7:14 ` Manivannan Sadhasivam
2026-09-10 10:03 ` Krzysztof Kozlowski
2026-09-09 11:48 ` [PATCH v3 2/5] dt-bindings: pci: qcom: add Nord PCIe controller compatible Krishna Chaitanya Chundru
2026-09-09 11:53 ` sashiko-bot
2026-09-10 6:46 ` Shawn Guo
2026-09-09 11:48 ` [PATCH v3 3/5] PCI: qcom: Add CGC disable workaround for Nord PCIe Krishna Chaitanya Chundru
2026-09-09 11:54 ` sashiko-bot
2026-09-10 6:47 ` Shawn Guo
2026-09-10 7:20 ` Manivannan Sadhasivam
2026-09-10 7:29 ` Konrad Dybcio
2026-09-10 7:36 ` Manivannan Sadhasivam
2026-09-09 11:48 ` [PATCH v3 4/5] phy: qcom: qmp: Move qphy_setbits/clrbits/checkbits to common header Krishna Chaitanya Chundru
2026-09-09 11:54 ` sashiko-bot
2026-09-10 6:48 ` Shawn Guo
2026-09-10 7:24 ` Manivannan Sadhasivam
2026-09-09 11:48 ` [PATCH v3 5/5] phy: qcom: qmp-pcie: Add Nord Gen5x16 PCIe multi-PHY support Krishna Chaitanya Chundru
2026-09-09 12:07 ` sashiko-bot
2026-09-10 5:52 ` Shawn Guo
2026-09-10 7:35 ` Manivannan Sadhasivam
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