From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Manivannan Sadhasivam <mani@kernel.org>,
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Cc: "Vinod Koul" <vkoul@kernel.org>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Bjorn Andersson" <andersson@kernel.org>,
"Maxime Chevallier" <maxime.chevallier@bootlin.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, shengchao.guo@oss.qualcomm.com
Subject: Re: [PATCH v3 3/5] PCI: qcom: Add CGC disable workaround for Nord PCIe
Date: Thu, 10 Sep 2026 09:29:10 +0200 [thread overview]
Message-ID: <678b6d96-6a61-4689-afc0-363b7a6f209c@oss.qualcomm.com> (raw)
In-Reply-To: <smgyk5ray7laj2ltwnmx3r7cfiouj4hyn7tyfmx7rpsrhu7kin@p5pr7wdoprjn>
On 9/10/26 9:20 AM, Manivannan Sadhasivam wrote:
> On Wed, Sep 09, 2026 at 05:18:18PM +0530, Krishna Chaitanya Chundru wrote:
>> Nord requires a workaround to address a timing convergence issue in the
>> PCIe power domain. To avoid the issue, set the CORE_CLK_CGC_DIS and
>> AUX_PWR_DET bits in PARF_SYS_CTRL after controller initialization.
[...]
>> +static const struct qcom_pcie_cfg cfg_nord = {
>
> Can you use DWC IP version instead of SoC name?
I'd say it's fine given other implementations of the same DWC IP may not
have this clock gating quirk
Konrad
next prev parent reply other threads:[~2026-09-10 7:29 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-09 11:48 [PATCH v3 0/5] Add PCIe support for Qualcomm Nord platform Krishna Chaitanya Chundru
2026-09-09 11:48 ` [PATCH v3 1/5] dt-bindings: phy: qcom: add Nord QMP PCIe PHY binding Krishna Chaitanya Chundru
2026-09-09 11:53 ` sashiko-bot
2026-09-10 6:43 ` Shawn Guo
2026-09-10 7:14 ` Manivannan Sadhasivam
2026-09-10 10:03 ` Krzysztof Kozlowski
2026-09-09 11:48 ` [PATCH v3 2/5] dt-bindings: pci: qcom: add Nord PCIe controller compatible Krishna Chaitanya Chundru
2026-09-09 11:53 ` sashiko-bot
2026-09-10 6:46 ` Shawn Guo
2026-09-09 11:48 ` [PATCH v3 3/5] PCI: qcom: Add CGC disable workaround for Nord PCIe Krishna Chaitanya Chundru
2026-09-09 11:54 ` sashiko-bot
2026-09-10 6:47 ` Shawn Guo
2026-09-10 7:20 ` Manivannan Sadhasivam
2026-09-10 7:29 ` Konrad Dybcio [this message]
2026-09-10 7:36 ` Manivannan Sadhasivam
2026-09-09 11:48 ` [PATCH v3 4/5] phy: qcom: qmp: Move qphy_setbits/clrbits/checkbits to common header Krishna Chaitanya Chundru
2026-09-09 11:54 ` sashiko-bot
2026-09-10 6:48 ` Shawn Guo
2026-09-10 7:24 ` Manivannan Sadhasivam
2026-09-09 11:48 ` [PATCH v3 5/5] phy: qcom: qmp-pcie: Add Nord Gen5x16 PCIe multi-PHY support Krishna Chaitanya Chundru
2026-09-09 12:07 ` sashiko-bot
2026-09-10 5:52 ` Shawn Guo
2026-09-10 7:35 ` Manivannan Sadhasivam
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