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From: Yin Li <yin.li@oss.qualcomm.com>
To: James Morse <james.morse@arm.com>, Rob Herring <robh@kernel.org>,
	Shanker Donthineni <sdonthineni@nvidia.com>,
	Ben Horgan <ben.horgan@arm.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Danilo Krummrich <dakr@kernel.org>,
	Reinette Chatre <reinette.chatre@intel.com>,
	Fenghua Yu <fenghuay@nvidia.com>,
	Jonathan Cameron <jic23@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Gavin Shan <gshan@redhat.com>
Cc: "Yin Li" <yin.li@oss.qualcomm.com>,
	"Andre Przywara" <andre.przywara@arm.com>,
	"Drew Fustini" <fustini@kernel.org>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Shaopeng Tan" <tan.shaopeng@jp.fujitsu.com>,
	trilok.soni@oss.qualcomm.com, aiqun.yu@oss.qualcomm.com,
	ganapatrao.kulkarni@oss.qualcomm.com,
	"Srivathsa L Rao" <srivathsa.rao@oss.qualcomm.com>,
	"Huang Yiwei" <huang.yiwei@oss.qualcomm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	driver-core@lists.linux.dev, devicetree@vger.kernel.org
Subject: [PATCH RFC v2 06/10] arm_mpam: Add support for memory controller MSC on DT platforms
Date: Mon, 14 Sep 2026 17:37:54 +0800	[thread overview]
Message-ID: <20260914-mpam-resctrl-dt-knp-support-v2-6-bf6645bb2f65@oss.qualcomm.com> (raw)
In-Reply-To: <20260914-mpam-resctrl-dt-knp-support-v2-0-bf6645bb2f65@oss.qualcomm.com>

From: Shanker Donthineni <sdonthineni@nvidia.com>

The MPAM DT path only handles cache MSCs. Memory-controller MSCs
cannot be probed yet.

Add support to discover memory-controller MSCs from the device tree:
derive the component id from the NUMA node and create a 'memory' class
RIS, and treat a memory parent as accessible from all CPUs.

Signed-off-by: Shanker Donthineni <sdonthineni@nvidia.com>
[ morse: split out of a bigger patch, added affinity piece ]
Signed-off-by: James Morse <james.morse@arm.com>
[ Yin Li: fix context offset conflicts; use of_node_get() for the memory
  parent to avoid a refcount underflow; use u32 instead of unsigned long
  for component_id and compare against ~0U ]
Signed-off-by: Yin Li <yin.li@oss.qualcomm.com>
---
 drivers/resctrl/mpam_devices.c | 55 ++++++++++++++++++++++++++++++------------
 1 file changed, 40 insertions(+), 15 deletions(-)

diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
index 7a5b27e87759..480e38cfa86d 100644
--- a/drivers/resctrl/mpam_devices.c
+++ b/drivers/resctrl/mpam_devices.c
@@ -263,10 +263,12 @@ static int mpam_dt_parse_resource(struct mpam_msc *msc, struct device_node *np,
 				  u8 ris_idx)
 {
 	int err = 0;
-	u32 level = 0;
-	u32 cache_id;
+	u32 class_id = 0;
+	u32 component_id = 0;
 	struct device *dev = &msc->pdev->dev;
+	enum mpam_class_types type = MPAM_CLASS_UNKNOWN;
 	struct device_node *cache __free(device_node) = NULL;
+	struct device_node *memory __free(device_node) = NULL;
 	struct device_node *parent __free(device_node) = of_get_parent(np);
 
 	if (of_device_is_compatible(np, "arm,mpam-cache")) {
@@ -275,27 +277,48 @@ static int mpam_dt_parse_resource(struct mpam_msc *msc, struct device_node *np,
 			dev_err_once(dev, "Failed to read phandle\n");
 			return -EINVAL;
 		}
+		type = MPAM_CLASS_CACHE;
+
 	} else if (of_device_is_compatible(parent, "cache")) {
 		cache = of_node_get(parent);
+		type = MPAM_CLASS_CACHE;
+	} else if (of_device_is_compatible(np, "arm,mpam-memory")) {
+		memory = of_parse_phandle(np, "arm,mpam-device", 0);
+		if (!memory) {
+			dev_err_once(dev, "Failed to read phandle\n");
+			return -EINVAL;
+		}
+		type = MPAM_CLASS_MEMORY;
+	} else if (of_device_is_compatible(np, "arm,mpam-memory-controller-msc")) {
+		memory = of_node_get(parent);
+		type = MPAM_CLASS_MEMORY;
 	} else {
-		/* For now, only caches are supported */
-		cache = NULL;
-		return err;
-	}
-
-	err = of_property_read_u32(cache, "cache-level", &level);
-	if (err) {
-		dev_err_once(dev, "Failed to read cache-level\n");
+		/*
+		 * For now, only caches and memory controllers are
+		 * supported.
+		 */
 		return err;
 	}
 
-	cache_id = cache_of_calculate_id(cache);
-	if (cache_id == ~0U) {
-		dev_err_once(dev, "Failed to calculate cache-id\n");
-		return -ENOENT;
+	/* Determine the class and component ids, based on type. */
+	if (type == MPAM_CLASS_CACHE) {
+		err = of_property_read_u32(cache, "cache-level", &class_id);
+		if (err) {
+			dev_err_once(dev, "Failed to read cache-level\n");
+			return err;
+		}
+		component_id = cache_of_calculate_id(cache);
+		if (component_id == ~0U) {
+			dev_err_once(dev, "Failed to calculate cache-id\n");
+			return -ENOENT;
+		}
+	} else if (type == MPAM_CLASS_MEMORY) {
+		err = of_node_to_nid(np);
+		component_id = (err == NUMA_NO_NODE) ? 0 : err;
+		class_id = MPAM_CLASS_ID_DEFAULT;
 	}
 
-	return mpam_ris_create(msc, ris_idx, MPAM_CLASS_CACHE, level, cache_id);
+	return mpam_ris_create(msc, ris_idx, type, class_id, component_id);
 }
 
 static int mpam_dt_parse_resources(struct mpam_msc *msc, void *ignored)
@@ -2169,6 +2192,8 @@ static void update_msc_accessibility(struct mpam_msc *msc)
 	} else {
 		if (of_device_is_compatible(parent, "cache"))
 			get_cpumask_from_cache(parent, &msc->accessibility);
+		else if (of_device_is_compatible(parent, "memory"))
+			cpumask_copy(&msc->accessibility, cpu_possible_mask);
 		else
 			dev_err_once(dev, "Cannot determine accessibility of MSC.\n");
 	}

-- 
2.34.1


  parent reply	other threads:[~2026-09-14  9:40 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-14  9:37 [PATCH RFC v2 00/10] arm-mpam: Add basic device tree support for resctrl Yin Li
2026-09-14  9:37 ` [PATCH RFC v2 01/10] arm_mpam: Fix the RIS index range check in mpam_ris_create_locked Yin Li
2026-10-02 15:50   ` Ben Horgan
2026-09-14  9:37 ` [PATCH RFC v2 02/10] arm_mpam: Fix MSC MMIO window size off-by-one with resource_size() Yin Li
2026-09-14  9:58   ` sashiko-bot
2026-09-14  9:37 ` [PATCH RFC v2 03/10] dt-bindings: arm: Add MPAM MSC binding Yin Li
2026-09-14 14:41   ` Andre Przywara
2026-09-14 14:50     ` Andre Przywara
2026-09-15  2:49       ` Yin Li
2026-09-14  9:37 ` [PATCH RFC v2 04/10] cacheinfo: Expose the code to generate a cache-id from a device_node Yin Li
2026-09-14  9:52   ` sashiko-bot
2026-09-14 12:26   ` Andre Przywara
2026-09-15  6:49     ` Yin Li
2026-09-15  7:59       ` Andre Przywara
2026-09-16  2:29         ` Yin Li
2026-09-14  9:37 ` [PATCH RFC v2 05/10] arm_mpam: Add device tree support for MSC probing Yin Li
2026-09-14  9:52   ` sashiko-bot
2026-09-14  9:37 ` Yin Li [this message]
2026-09-14  9:53   ` [PATCH RFC v2 06/10] arm_mpam: Add support for memory controller MSC on DT platforms sashiko-bot
2026-09-14  9:37 ` [PATCH RFC v2 07/10] arm_mpam: Fix mpam_dt_create_foundling_msc() to create MSC platform devices Yin Li
2026-09-14  9:58   ` sashiko-bot
2026-09-23  2:59   ` Yin Li
2026-09-14  9:37 ` [PATCH RFC v2 08/10] dt-bindings: arm: Fix MPAM MSC binding schema and examples Yin Li
2026-09-14  9:37 ` [PATCH RFC v2 09/10] arm_mpam: Support MSC accessibility derivation from RIS nodes Yin Li
2026-09-14  9:37 ` [PATCH DNM RFC v2 10/10] arm64: dts: qcom: kaanapali: Add MPAM MSC nodes for the L2 caches Yin Li
2026-09-14  9:59   ` sashiko-bot

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