From: sashiko-bot@kernel.org
To: "Han Gao" <gaohan@iscas.ac.cn>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH 2/4] spi: sg2044-nor: Honor SPI clock limits
Date: Thu, 17 Sep 2026 14:39:24 +0000 [thread overview]
Message-ID: <20260917143924.8E0CE1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260917-fix-sg204xspi-v1-2-5c95dac429a8@iscas.ac.cn>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] spi: sg2044-nor: AB-BA deadlock between spifmc->lock and CCF prepare_lock
--
commit fd13672e4c9fa0fb60925d0020a99edbeb412a79
Author: Han Gao <gaohan@iscas.ac.cn>
spi: sg2044-nor: Honor SPI clock limits
The fixed divider ignores device and operation clock limits. Calculate
the divider before each transfer so SCK does not exceed either limit.
> diff --git a/drivers/spi/spi-sg2044-nor.c b/drivers/spi/spi-sg2044-nor.c
> index ff026ca0f7663..f2a1074f68477 100644
> --- a/drivers/spi/spi-sg2044-nor.c
> +++ b/drivers/spi/spi-sg2044-nor.c
[ ... ]
> @@ -385,6 +385,29 @@ static ssize_t sg2044_spifmc_trans_reg(struct sg2044_spifmc *spifmc,
> return 0;
> }
>
> +static int sg2044_spifmc_set_speed(struct sg2044_spifmc *spifmc,
> + unsigned int speed_hz)
> +{
> + unsigned long rate = clk_get_rate(spifmc->clk);
[Severity: High]
Does this sequence introduce an AB-BA deadlock between the local hardware
lock and the global Common Clock Framework prepare_lock?
In sg2044_spifmc_exec_op(), the data-plane hot path for SPI NOR transfers
acquires the local lock:
mutex_lock(&spifmc->lock);
It then calls sg2044_spifmc_set_speed(), which unconditionally queries the
clock framework here via clk_get_rate().
Under the Common Clock Framework, clk_get_rate() acquires the global
prepare_lock mutex. This creates a lock hierarchy inversion. If a thread
holding prepare_lock (e.g., during clk_prepare() which may require
firmware or trigger a page fault) requires a read from the SPI NOR flash,
it will block waiting for spifmc->lock. Concurrently, an SPI NOR operation
holding spifmc->lock will block waiting for prepare_lock.
Additionally, repeatedly acquiring a global subsystem mutex in a hot data
path can cause severe performance bottlenecks for clock operations
system-wide.
Could the clock rate be cached during probe() instead of querying it per
transfer?
> + u64 div;
> + u32 reg;
> +
> + if (!rate || !speed_hz)
> + return -EINVAL;
[ ... ]
> @@ -395,11 +418,18 @@ static int sg2044_spifmc_exec_op(struct spi_mem *mem,
>
> mutex_lock(&spifmc->lock);
>
> + ret = sg2044_spifmc_set_speed(spifmc, op->max_freq ?
> + min(op->max_freq, mem->spi->max_speed_hz) :
> + mem->spi->max_speed_hz);
> + if (ret)
> + goto out_unlock;
> +
> if (op->addr.nbytes == 0)
> ret = sg2044_spifmc_trans_reg(spifmc, op);
> else
> ret = sg2044_spifmc_trans(spifmc, op);
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260917-fix-sg204xspi-v1-0-5c95dac429a8@iscas.ac.cn?part=2
next prev parent reply other threads:[~2026-09-17 14:39 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-17 14:29 [PATCH 0/4] spi: sophgo: Fix SPI NOR errors and clock limits Han Gao
2026-09-17 14:29 ` [PATCH 1/4] spi: sg2044-nor: Return transfer errors Han Gao
2026-09-17 14:29 ` [PATCH 2/4] spi: sg2044-nor: Honor SPI clock limits Han Gao
2026-09-17 14:39 ` sashiko-bot [this message]
2026-09-17 20:38 ` Mark Brown
2026-09-17 14:29 ` [PATCH 3/4] riscv: dts: sophgo: Enable SPI NOR on SRD3-10 Han Gao
2026-09-17 14:29 ` [PATCH 4/4] riscv: dts: sophgo: Limit SG2042 SPI NOR to 12.5 MHz Han Gao
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