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From: Mark Brown <broonie@kernel.org>
To: Han Gao <gaohan@iscas.ac.cn>
Cc: Longbin Li <looong.bin@gmail.com>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Chen Wang <chen.wang@linux.dev>,
	Inochi Amaoto <inochiama@gmail.com>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Han Gao <rabenda.cn@gmail.com>,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, sophgo@lists.linux.dev,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH 2/4] spi: sg2044-nor: Honor SPI clock limits
Date: Thu, 17 Sep 2026 21:38:12 +0100	[thread overview]
Message-ID: <fd3dad9f-7997-47ce-875d-db43901002f3@sirena.org.uk> (raw)
In-Reply-To: <20260917-fix-sg204xspi-v1-2-5c95dac429a8@iscas.ac.cn>

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On Thu, Sep 17, 2026 at 10:29:20PM +0800, Han Gao wrote:
> The fixed divider ignores device and operation clock limits. Calculate
> the divider before each transfer so SCK does not exceed either limit.

> +static int sg2044_spifmc_set_speed(struct sg2044_spifmc *spifmc,
> +				   unsigned int speed_hz)
> +{
> +	unsigned long rate = clk_get_rate(spifmc->clk);
> +	u64 div;
> +	u32 reg;
> +
> +	if (!rate || !speed_hz)
> +		return -EINVAL;

Specifying a maximum speed is optional so we might have a currently
working setup with one omitted.  The driver should just go with the
maximum speed it supports in that case.

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  parent reply	other threads:[~2026-09-17 20:38 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-17 14:29 [PATCH 0/4] spi: sophgo: Fix SPI NOR errors and clock limits Han Gao
2026-09-17 14:29 ` [PATCH 1/4] spi: sg2044-nor: Return transfer errors Han Gao
2026-09-17 14:29 ` [PATCH 2/4] spi: sg2044-nor: Honor SPI clock limits Han Gao
2026-09-17 14:39   ` sashiko-bot
2026-09-17 20:38   ` Mark Brown [this message]
2026-09-17 14:29 ` [PATCH 3/4] riscv: dts: sophgo: Enable SPI NOR on SRD3-10 Han Gao
2026-09-17 14:29 ` [PATCH 4/4] riscv: dts: sophgo: Limit SG2042 SPI NOR to 12.5 MHz Han Gao

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