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From: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
To: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Abel Vesa <abelvesa@kernel.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org,
	Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Subject: [PATCH 2/4] arm64: dts: qcom: hawi: Add header file for IPCC physical client IDs
Date: Wed, 23 Sep 2026 01:48:36 +0530	[thread overview]
Message-ID: <20260923-hawi-dt-post-v1-2-e41473b6298b@oss.qualcomm.com> (raw)
In-Reply-To: <20260923-hawi-dt-post-v1-0-e41473b6298b@oss.qualcomm.com>

Physical client IDs are used on Hawi Inter Process Communication
Controller (IPCC), add a corresponding header file.

Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/hawi-ipcc.h | 61 ++++++++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/hawi-ipcc.h b/arch/arm64/boot/dts/qcom/hawi-ipcc.h
new file mode 100644
index 000000000000..67f228e1aa0e
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/hawi-ipcc.h
@@ -0,0 +1,61 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef __DTS_HAWI_MAILBOX_IPCC_H
+#define __DTS_HAWI_MAILBOX_IPCC_H
+
+/* Physical client IDs */
+#define IPCC_MPROC_AOP			0
+#define IPCC_MPROC_TZ			1
+#define IPCC_MPROC_MPSS			2
+#define IPCC_MPROC_LPASS		3
+#define IPCC_MPROC_SDC			4
+#define IPCC_MPROC_CDSP			5
+#define IPCC_MPROC_APSS			6
+#define IPCC_MPROC_SPSS			15
+#define IPCC_MPROC_TME			16
+#define IPCC_MPROC_SOCCP		12
+#define IPCC_MPROC_DCP			13
+#define IPCC_MPROC_QECP			14
+
+#define IPCC_COMPUTE_L0_LPASS		1
+#define IPCC_COMPUTE_L0_CDSP		2
+#define IPCC_COMPUTE_L0_APSS		3
+#define IPCC_COMPUTE_L0_GPU		4
+#define IPCC_COMPUTE_L0_CVP		8
+#define IPCC_COMPUTE_L0_CAM		9
+#define IPCC_COMPUTE_L0_VPU		12
+#define IPCC_COMPUTE_L0_SOCCP		16
+#define IPCC_COMPUTE_L0_CAM1		10
+#define IPCC_COMPUTE_L0_DCP		11
+
+#define IPCC_COMPUTE_L1_LPASS		1
+#define IPCC_COMPUTE_L1_CDSP		2
+#define IPCC_COMPUTE_L1_APSS		3
+#define IPCC_COMPUTE_L1_GPU		4
+#define IPCC_COMPUTE_L1_CVP		8
+#define IPCC_COMPUTE_L1_CAM		9
+#define IPCC_COMPUTE_L1_VPU		12
+#define IPCC_COMPUTE_L1_SOCCP		16
+#define IPCC_COMPUTE_L1_CAM1		10
+#define IPCC_COMPUTE_L1_DCP		11
+
+#define IPCC_PERIPH_CDSP		2
+#define IPCC_PERIPH_APSS		3
+#define IPCC_PERIPH_PCIE0		4
+#define IPCC_PERIPH_PCIE1		15
+
+#define IPCC_FENCE_LPASS		1
+#define IPCC_FENCE_CDSP			2
+#define IPCC_FENCE_APSS			3
+#define IPCC_FENCE_GPU			4
+#define IPCC_FENCE_CVP			8
+#define IPCC_FENCE_CAM			9
+#define IPCC_FENCE_VPU			20
+#define IPCC_FENCE_SOCCP		24
+#define IPCC_FENCE_CAM1			10
+#define IPCC_FENCE_DCP			11
+
+#endif

-- 
2.55.0


  parent reply	other threads:[~2026-09-22 20:25 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-22 20:18 [PATCH 0/4] arm64: dts: qcom: Introduce Qualcomm Hawi platform device tree Mukesh Ojha
2026-09-22 20:18 ` [PATCH 1/4] dt-bindings: arm: cpus: Add Oryon PartNum 3 CPU compatibles Mukesh Ojha
2026-09-22 20:18 ` Mukesh Ojha [this message]
2026-09-22 20:18 ` [PATCH 3/4] arm64: dts: qcom: Introduce Hawi SoC Mukesh Ojha
2026-09-22 20:38   ` sashiko-bot
2026-09-23 17:36     ` Mukesh Ojha
2026-09-23 10:41   ` Konrad Dybcio
2026-09-23 13:03     ` Mukesh Ojha
2026-09-22 20:18 ` [PATCH 4/4] arm64: dts: qcom: hawi: Add base MTP board Mukesh Ojha
2026-09-22 20:39   ` sashiko-bot
2026-09-23 13:04     ` Mukesh Ojha
2026-09-23 10:42   ` Konrad Dybcio
2026-09-23 12:59     ` Mukesh Ojha
2026-09-24  1:06 ` (subset) [PATCH 0/4] arm64: dts: qcom: Introduce Qualcomm Hawi platform device tree Bjorn Andersson

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