Re: [PATCH v3 1/2] arm64: dts: qcom: nord: add GPI DMA controller nodes

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] dma: qcom: gpi: Scrambled interrupts array in gpi_dma0 causes IRQ mismatches
- [Low] dt-bindings: dma: qcom: gpi: Undocumented compatible string qcom,nord-gpi-dma
--

commit 5ff2ae7892f38ac7390ba140de7687b5b2755c79
Author: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>

arm64: dts: qcom: nord: add GPI DMA controller nodes

This commit adds GPI DMA controller nodes for all three QUPv3 engines in the
Qualcomm nord device tree.

> diff --git a/arch/arm64/boot/dts/qcom/nord.dtsi b/arch/arm64/boot/dts/qcom/nord.dtsi
> index e0496fd40c308..bc48238050ecc 100644
> --- a/arch/arm64/boot/dts/qcom/nord.dtsi
> +++ b/arch/arm64/boot/dts/qcom/nord.dtsi
[ ... ]
> @@ -909,6 +910,27 @@ soc: soc@0 {
>  		dma-ranges = <0 0 0 0 0x10 0>;
>  		ranges = <0 0 0 0 0x10 0>;
>  
> +		gpi_dma2: dma-controller@800000 {
> +			compatible = "qcom,nord-gpi-dma", "qcom,sm6350-gpi-dma";

[Severity: Low]
Are there plans to add this compatible string to the device tree bindings
schema?

The string "qcom,nord-gpi-dma" is missing from the bindings documentation
(Documentation/devicetree/bindings/dma/qcom,gpi.yaml). Device tree rules
mandate that all specific compatible strings must be formally documented,
otherwise running dtbs_check will result in schema validation failures.
This applies to all three new nodes introduced in this patch.

[ ... ]
> @@ -1107,6 +1129,27 @@ uart20: serial@898000 {
>  			};
>  		};
>  
> +		gpi_dma0: dma-controller@900000 {
> +			compatible = "qcom,nord-gpi-dma", "qcom,sm6350-gpi-dma";
> +			reg = <0x0 0x00900000 0x0 0x60000>;
> +			#dma-cells = <3>;
> +			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;

[Severity: High]
Is the out-of-order sequence of interrupts intentional here?

The qcom-gpi-dma driver (drivers/dma/qcom/gpi.c) maps Execution Environments
to physical IRQs by array index using platform_get_irq(pdev, i). In gpi_dma0,
the interrupts array interleaves two distinct numerical groups (116-121 and
205-223) instead of listing them sequentially.

Since the IRQs are mapped by array index, this sequence assigns incorrect
physical interrupts to the corresponding EEs (for example, EE 1 gets 205
instead of 117). This will break IRQ routing and can lead to DMA channel
interrupt mismatches and failures in peripheral operations.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260924-nord-gpi-dts-v3-0-74a85134699f@oss.qualcomm.com?part=1