[PATCH 0/3] arm64: dts: apple: dt-check-style strict fixes for Apple M4

[PATCH 0/3] arm64: dts: apple: dt-check-style strict fixes for Apple M4

[Yureka Lilian]

Hi,

mirroring recent changes to the M3 and M3 Pro/Max/Ultra device trees,
this makes the M4 device trees broadly compliant with
`dt-check-style --mode=strict`, leaving the same exceptions:

- line-length errors up to 82 columns are left as-is
- cache-related properties are left out of order to preserve human
  readability
- the property-order and line-length issues in the generated pmgr nodes
  are left as-is

I checked carefully that the modifications do not cause any functional
change in the compiled DTs.

Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
Yureka Lilian (3):
      dts: apple: t8132: Fix blank-lines-related dt-check-style issues
      dts: apple: t8132: Fix ordering-related dt-check-style issues
      dts: apple: t8132: Fix some line-length-related dt-check-style issues

 arch/arm64/boot/dts/apple/t8132-j604.dts  |   9 +-
 arch/arm64/boot/dts/apple/t8132-j713.dts  |   9 +-
 arch/arm64/boot/dts/apple/t8132-j715.dts  |   9 +-
 arch/arm64/boot/dts/apple/t8132-jxxx.dtsi |   8 +-
 arch/arm64/boot/dts/apple/t8132.dtsi      | 210 +++++++++++++++++-------------
 5 files changed, 142 insertions(+), 103 deletions(-)
---
base-commit: eea4f3b5e9e19389af3b99af64cdf7352b67c298
change-id: 20260924-apple-dts-m4-dt-style-check-6e1f9dc92807

Best regards,
--  
Yureka Lilian <yureka@cyberchaos.dev>

[PATCH 1/3] dts: apple: t8132: Fix blank-lines-related dt-check-style issues

[Yureka Lilian]

This fixes all `dt-check-style --mode=strict` issues related to blank
lines in the t8132 device tres.

Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 arch/arm64/boot/dts/apple/t8132-j604.dts  | 1 +
 arch/arm64/boot/dts/apple/t8132-j713.dts  | 1 +
 arch/arm64/boot/dts/apple/t8132-j715.dts  | 1 +
 arch/arm64/boot/dts/apple/t8132-jxxx.dtsi | 1 +
 arch/arm64/boot/dts/apple/t8132.dtsi      | 8 ++++++++
 5 files changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/apple/t8132-j604.dts b/arch/arm64/boot/dts/apple/t8132-j604.dts
index c4be915cb33a..93076cd923a9 100644
--- a/arch/arm64/boot/dts/apple/t8132-j604.dts
+++ b/arch/arm64/boot/dts/apple/t8132-j604.dts
@@ -19,6 +19,7 @@ / {
 
 	led-controller {
 		compatible = "pwm-leds";
+
 		led-0 {
 			pwms = <&fpwm1 0 40000>;
 			label = "kbd_backlight";
diff --git a/arch/arm64/boot/dts/apple/t8132-j713.dts b/arch/arm64/boot/dts/apple/t8132-j713.dts
index e1fc5d47f487..892a3812bc65 100644
--- a/arch/arm64/boot/dts/apple/t8132-j713.dts
+++ b/arch/arm64/boot/dts/apple/t8132-j713.dts
@@ -19,6 +19,7 @@ / {
 
 	led-controller {
 		compatible = "pwm-leds";
+
 		led-0 {
 			pwms = <&fpwm1 0 40000>;
 			label = "kbd_backlight";
diff --git a/arch/arm64/boot/dts/apple/t8132-j715.dts b/arch/arm64/boot/dts/apple/t8132-j715.dts
index 2672914ea76c..212d194bd1ae 100644
--- a/arch/arm64/boot/dts/apple/t8132-j715.dts
+++ b/arch/arm64/boot/dts/apple/t8132-j715.dts
@@ -19,6 +19,7 @@ / {
 
 	led-controller {
 		compatible = "pwm-leds";
+
 		led-0 {
 			pwms = <&fpwm1 0 40000>;
 			label = "kbd_backlight";
diff --git a/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi
index 9882ea3f85e6..b0c5d71943b6 100644
--- a/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi
+++ b/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi
@@ -26,6 +26,7 @@ framebuffer0: framebuffer@0 {
 			reg = <0 0 0 0>; /* To be filled by loader */
 			power-domains = <&ps_disp_fe>, <&ps_dptx_phy>;
 			/* Format properties will be added by loader */
+
 			status = "disabled";
 		};
 	};
diff --git a/arch/arm64/boot/dts/apple/t8132.dtsi b/arch/arm64/boot/dts/apple/t8132.dtsi
index afec92a06015..1ea488ce6e1c 100644
--- a/arch/arm64/boot/dts/apple/t8132.dtsi
+++ b/arch/arm64/boot/dts/apple/t8132.dtsi
@@ -24,18 +24,23 @@ cluster0 {
 				core0 {
 					cpu = <&cpu_e0>;
 				};
+
 				core1 {
 					cpu = <&cpu_e1>;
 				};
+
 				core2 {
 					cpu = <&cpu_e2>;
 				};
+
 				core3 {
 					cpu = <&cpu_e3>;
 				};
+
 				core4 {
 					cpu = <&cpu_e4>;
 				};
+
 				core5 {
 					cpu = <&cpu_e5>;
 				};
@@ -45,12 +50,15 @@ cluster1 {
 				core0 {
 					cpu = <&cpu_p0>;
 				};
+
 				core1 {
 					cpu = <&cpu_p1>;
 				};
+
 				core2 {
 					cpu = <&cpu_p2>;
 				};
+
 				core3 {
 					cpu = <&cpu_p3>;
 				};

-- 
2.55.0

[PATCH 2/3] dts: apple: t8132: Fix ordering-related dt-check-style issues

[Yureka Lilian]

This fixes most `dt-check-style --mode=strict` issues related to
node and property ordering in the t8132 device tres.
The cache-related properties are kept in their own sorting group,
separated by a newline from the rest, to improve human readability.

Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 arch/arm64/boot/dts/apple/t8132-j604.dts  |   8 +-
 arch/arm64/boot/dts/apple/t8132-j713.dts  |   8 +-
 arch/arm64/boot/dts/apple/t8132-j715.dts  |   8 +-
 arch/arm64/boot/dts/apple/t8132-jxxx.dtsi |   4 +-
 arch/arm64/boot/dts/apple/t8132.dtsi      | 195 +++++++++++++++++-------------
 5 files changed, 123 insertions(+), 100 deletions(-)

diff --git a/arch/arm64/boot/dts/apple/t8132-j604.dts b/arch/arm64/boot/dts/apple/t8132-j604.dts
index 93076cd923a9..676c1d1f3a14 100644
--- a/arch/arm64/boot/dts/apple/t8132-j604.dts
+++ b/arch/arm64/boot/dts/apple/t8132-j604.dts
@@ -21,12 +21,12 @@ led-controller {
 		compatible = "pwm-leds";
 
 		led-0 {
-			pwms = <&fpwm1 0 40000>;
-			label = "kbd_backlight";
-			function = LED_FUNCTION_KBD_BACKLIGHT;
 			color = <LED_COLOR_ID_WHITE>;
-			max-brightness = <255>;
 			default-state = "keep";
+			function = LED_FUNCTION_KBD_BACKLIGHT;
+			label = "kbd_backlight";
+			max-brightness = <255>;
+			pwms = <&fpwm1 0 40000>;
 		};
 	};
 };
diff --git a/arch/arm64/boot/dts/apple/t8132-j713.dts b/arch/arm64/boot/dts/apple/t8132-j713.dts
index 892a3812bc65..b70d2cdacd3a 100644
--- a/arch/arm64/boot/dts/apple/t8132-j713.dts
+++ b/arch/arm64/boot/dts/apple/t8132-j713.dts
@@ -21,12 +21,12 @@ led-controller {
 		compatible = "pwm-leds";
 
 		led-0 {
-			pwms = <&fpwm1 0 40000>;
-			label = "kbd_backlight";
-			function = LED_FUNCTION_KBD_BACKLIGHT;
 			color = <LED_COLOR_ID_WHITE>;
-			max-brightness = <255>;
 			default-state = "keep";
+			function = LED_FUNCTION_KBD_BACKLIGHT;
+			label = "kbd_backlight";
+			max-brightness = <255>;
+			pwms = <&fpwm1 0 40000>;
 		};
 	};
 };
diff --git a/arch/arm64/boot/dts/apple/t8132-j715.dts b/arch/arm64/boot/dts/apple/t8132-j715.dts
index 212d194bd1ae..d0428a3c9484 100644
--- a/arch/arm64/boot/dts/apple/t8132-j715.dts
+++ b/arch/arm64/boot/dts/apple/t8132-j715.dts
@@ -21,12 +21,12 @@ led-controller {
 		compatible = "pwm-leds";
 
 		led-0 {
-			pwms = <&fpwm1 0 40000>;
-			label = "kbd_backlight";
-			function = LED_FUNCTION_KBD_BACKLIGHT;
 			color = <LED_COLOR_ID_WHITE>;
-			max-brightness = <255>;
 			default-state = "keep";
+			function = LED_FUNCTION_KBD_BACKLIGHT;
+			label = "kbd_backlight";
+			max-brightness = <255>;
+			pwms = <&fpwm1 0 40000>;
 		};
 	};
 };
diff --git a/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi
index b0c5d71943b6..09ab380a00e9 100644
--- a/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi
+++ b/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi
@@ -15,9 +15,9 @@ aliases {
 	};
 
 	chosen {
+		ranges;
 		#address-cells = <2>;
 		#size-cells = <2>;
-		ranges;
 
 		stdout-path = "serial0";
 
@@ -32,9 +32,9 @@ framebuffer0: framebuffer@0 {
 	};
 
 	reserved-memory {
+		ranges;
 		#address-cells = <2>;
 		#size-cells = <2>;
-		ranges;
 		/* To be filled by loader */
 	};
 
diff --git a/arch/arm64/boot/dts/apple/t8132.dtsi b/arch/arm64/boot/dts/apple/t8132.dtsi
index 1ea488ce6e1c..350ad7b3772b 100644
--- a/arch/arm64/boot/dts/apple/t8132.dtsi
+++ b/arch/arm64/boot/dts/apple/t8132.dtsi
@@ -15,6 +15,13 @@ / {
 	#address-cells = <2>;
 	#size-cells = <2>;
 
+	clkref: clock-ref {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+		clock-output-names = "clkref";
+	};
+
 	cpus {
 		#address-cells = <2>;
 		#size-cells = <0>;
@@ -66,171 +73,174 @@ core3 {
 		};
 
 		cpu_e0: cpu@0 {
-			compatible = "apple,donan-e";
 			device_type = "cpu";
+			compatible = "apple,donan-e";
 			reg = <0x0 0x0>;
-			enable-method = "spin-table";
 			cpu-release-addr = <0 0>;
-			next-level-cache = <&l2_cache_0>;
-			i-cache-size = <0x20000>;
+			enable-method = "spin-table";
+
 			d-cache-size = <0x10000>;
+			i-cache-size = <0x20000>;
+			next-level-cache = <&l2_cache_0>;
 		};
 
 		cpu_e1: cpu@1 {
-			compatible = "apple,donan-e";
 			device_type = "cpu";
+			compatible = "apple,donan-e";
 			reg = <0x0 0x1>;
-			enable-method = "spin-table";
 			cpu-release-addr = <0 0>;
-			next-level-cache = <&l2_cache_0>;
-			i-cache-size = <0x20000>;
+			enable-method = "spin-table";
+
 			d-cache-size = <0x10000>;
+			i-cache-size = <0x20000>;
+			next-level-cache = <&l2_cache_0>;
 		};
 
 		cpu_e2: cpu@2 {
-			compatible = "apple,donan-e";
 			device_type = "cpu";
+			compatible = "apple,donan-e";
 			reg = <0x0 0x2>;
-			enable-method = "spin-table";
 			cpu-release-addr = <0 0>;
-			next-level-cache = <&l2_cache_0>;
-			i-cache-size = <0x20000>;
+			enable-method = "spin-table";
+
 			d-cache-size = <0x10000>;
+			i-cache-size = <0x20000>;
+			next-level-cache = <&l2_cache_0>;
 		};
 
 		cpu_e3: cpu@3 {
-			compatible = "apple,donan-e";
 			device_type = "cpu";
+			compatible = "apple,donan-e";
 			reg = <0x0 0x3>;
-			enable-method = "spin-table";
 			cpu-release-addr = <0 0>;
-			next-level-cache = <&l2_cache_0>;
-			i-cache-size = <0x20000>;
+			enable-method = "spin-table";
+
 			d-cache-size = <0x10000>;
+			i-cache-size = <0x20000>;
+			next-level-cache = <&l2_cache_0>;
 		};
 
 		cpu_e4: cpu@4 {
-			compatible = "apple,donan-e";
 			device_type = "cpu";
+			compatible = "apple,donan-e";
 			reg = <0x0 0x4>;
-			enable-method = "spin-table";
 			cpu-release-addr = <0 0>;
-			next-level-cache = <&l2_cache_0>;
-			i-cache-size = <0x20000>;
+			enable-method = "spin-table";
+
 			d-cache-size = <0x10000>;
+			i-cache-size = <0x20000>;
+			next-level-cache = <&l2_cache_0>;
 		};
 
 		cpu_e5: cpu@5 {
-			compatible = "apple,donan-e";
 			device_type = "cpu";
+			compatible = "apple,donan-e";
 			reg = <0x0 0x5>;
-			enable-method = "spin-table";
 			cpu-release-addr = <0 0>;
-			next-level-cache = <&l2_cache_0>;
-			i-cache-size = <0x20000>;
+			enable-method = "spin-table";
+
 			d-cache-size = <0x10000>;
+			i-cache-size = <0x20000>;
+			next-level-cache = <&l2_cache_0>;
 		};
 
 		cpu_p0: cpu@10100 {
-			compatible = "apple,donan-p";
 			device_type = "cpu";
+			compatible = "apple,donan-p";
 			reg = <0x0 0x10100>;
-			enable-method = "spin-table";
 			cpu-release-addr = <0 0>;
-			next-level-cache = <&l2_cache_1>;
-			i-cache-size = <0x30000>;
+			enable-method = "spin-table";
+
 			d-cache-size = <0x20000>;
+			i-cache-size = <0x30000>;
+			next-level-cache = <&l2_cache_1>;
 		};
 
 		cpu_p1: cpu@10101 {
-			compatible = "apple,donan-p";
 			device_type = "cpu";
+			compatible = "apple,donan-p";
 			reg = <0x0 0x10101>;
-			enable-method = "spin-table";
 			cpu-release-addr = <0 0>;
-			next-level-cache = <&l2_cache_1>;
-			i-cache-size = <0x30000>;
+			enable-method = "spin-table";
+
 			d-cache-size = <0x20000>;
+			i-cache-size = <0x30000>;
+			next-level-cache = <&l2_cache_1>;
 		};
 
 		cpu_p2: cpu@10102 {
-			compatible = "apple,donan-p";
 			device_type = "cpu";
+			compatible = "apple,donan-p";
 			reg = <0x0 0x10102>;
-			enable-method = "spin-table";
 			cpu-release-addr = <0 0>;
-			next-level-cache = <&l2_cache_1>;
-			i-cache-size = <0x30000>;
+			enable-method = "spin-table";
+
 			d-cache-size = <0x20000>;
+			i-cache-size = <0x30000>;
+			next-level-cache = <&l2_cache_1>;
 		};
 
 		cpu_p3: cpu@10103 {
-			compatible = "apple,donan-p";
 			device_type = "cpu";
+			compatible = "apple,donan-p";
 			reg = <0x0 0x10103>;
-			enable-method = "spin-table";
 			cpu-release-addr = <0 0>;
-			next-level-cache = <&l2_cache_1>;
-			i-cache-size = <0x30000>;
+			enable-method = "spin-table";
+
 			d-cache-size = <0x20000>;
+			i-cache-size = <0x30000>;
+			next-level-cache = <&l2_cache_1>;
 		};
 
 		l2_cache_0: l2-cache-0 {
 			compatible = "cache";
 			cache-level = <2>;
-			cache-unified;
 			cache-size = <0x400000>;
+			cache-unified;
 		};
 
 		l2_cache_1: l2-cache-1 {
 			compatible = "cache";
 			cache-level = <2>;
-			cache-unified;
 			cache-size = <0x1000000>;
+			cache-unified;
 		};
 	};
 
-	clkref: clock-ref {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <24000000>;
-		clock-output-names = "clkref";
-	};
-
 	soc: soc {
 		compatible = "simple-bus";
-		#address-cells = <2>;
-		#size-cells = <2>;
 
 		ranges;
+		#address-cells = <2>;
 		nonposted-mmio;
+		#size-cells = <2>;
 
 		pmgr: power-management@380700000 {
 			compatible = "apple,t8132-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";
+			reg = <0x3 0x80700000 0 0x14000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
-			reg = <0x3 0x80700000 0 0x14000>;
 			/* child nodes are added in t8132-pmgr.dtsi */
 		};
 
 		aic: interrupt-controller@381000000 {
 			compatible = "apple,t8132-aic3", "apple,t8122-aic3";
-			#interrupt-cells = <3>;
-			interrupt-controller;
 			reg = <0x3 0x81000000 0x0 0x1cc000>,
 			      <0x3 0x81040000 0x0 0x4000>;
 			reg-names = "core", "event";
+			#interrupt-cells = <3>;
+			interrupt-controller;
 			power-domains = <&ps_aic>;
 
 			affinities {
 				e-core-pmu-affinity {
-					apple,fiq-index = <AIC_CPU_PMU_E>;
 					cpus = <&cpu_e0 &cpu_e1 &cpu_e2 &cpu_e3 &cpu_e4 &cpu_e5>;
+					apple,fiq-index = <AIC_CPU_PMU_E>;
 				};
 
 				p-core-pmu-affinity {
-					apple,fiq-index = <AIC_CPU_PMU_P>;
 					cpus = <&cpu_p0 &cpu_p1 &cpu_p2 &cpu_p3>;
+					apple,fiq-index = <AIC_CPU_PMU_P>;
 				};
 			};
 		};
@@ -238,15 +248,13 @@ p-core-pmu-affinity {
 		pinctrl_nub: pinctrl@3881f0000 {
 			compatible = "apple,t8132-pinctrl", "apple,t8103-pinctrl";
 			reg = <0x3 0x881f0000 0x0 0x4000>;
-			power-domains = <&ps_nub_gpio>;
 
-			gpio-controller;
 			#gpio-cells = <2>;
+			gpio-controller;
 			gpio-ranges = <&pinctrl_nub 0 0 32>;
-			apple,npins = <32>;
 
-			interrupt-controller;
 			#interrupt-cells = <2>;
+			interrupt-controller;
 			interrupt-parent = <&aic>;
 			interrupts = <AIC_IRQ 499 IRQ_TYPE_LEVEL_HIGH>,
 			             <AIC_IRQ 500 IRQ_TYPE_LEVEL_HIGH>,
@@ -255,13 +263,16 @@ pinctrl_nub: pinctrl@3881f0000 {
 			             <AIC_IRQ 503 IRQ_TYPE_LEVEL_HIGH>,
 			             <AIC_IRQ 504 IRQ_TYPE_LEVEL_HIGH>,
 			             <AIC_IRQ 505 IRQ_TYPE_LEVEL_HIGH>;
+
+			power-domains = <&ps_nub_gpio>;
+			apple,npins = <32>;
 		};
 
 		pmgr_mini: power-management@388280000 {
 			compatible = "apple,t8132-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";
+			reg = <0x3 0x88280000 0 0x4000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
-			reg = <0x3 0x88280000 0 0x4000>;
 			/* child nodes are added in t8132-pmgr.dtsi */
 		};
 
@@ -277,13 +288,12 @@ pinctrl_smc: pinctrl@38c820000 {
 			compatible = "apple,t8132-pinctrl", "apple,t8103-pinctrl";
 			reg = <0x3 0x8c820000 0x0 0x4000>;
 
-			gpio-controller;
 			#gpio-cells = <2>;
+			gpio-controller;
 			gpio-ranges = <&pinctrl_smc 0 0 18>;
-			apple,npins = <18>;
 
-			interrupt-controller;
 			#interrupt-cells = <2>;
+			interrupt-controller;
 			interrupt-parent = <&aic>;
 			interrupts = <AIC_IRQ 552 IRQ_TYPE_LEVEL_HIGH>,
 			             <AIC_IRQ 553 IRQ_TYPE_LEVEL_HIGH>,
@@ -292,19 +302,20 @@ pinctrl_smc: pinctrl@38c820000 {
 			             <AIC_IRQ 556 IRQ_TYPE_LEVEL_HIGH>,
 			             <AIC_IRQ 557 IRQ_TYPE_LEVEL_HIGH>,
 			             <AIC_IRQ 558 IRQ_TYPE_LEVEL_HIGH>;
+
+			apple,npins = <18>;
 		};
 
 		pinctrl_aop: pinctrl@390824000 {
 			compatible = "apple,t8132-pinctrl", "apple,t8103-pinctrl";
 			reg = <0x3 0x90824000 0x0 0x4000>;
 
-			gpio-controller;
 			#gpio-cells = <2>;
+			gpio-controller;
 			gpio-ranges = <&pinctrl_aop 0 0 57>;
-			apple,npins = <57>;
 
-			interrupt-controller;
 			#interrupt-cells = <2>;
+			interrupt-controller;
 			interrupt-parent = <&aic>;
 			interrupts = <AIC_IRQ 423 IRQ_TYPE_LEVEL_HIGH>,
 			             <AIC_IRQ 424 IRQ_TYPE_LEVEL_HIGH>,
@@ -313,20 +324,20 @@ pinctrl_aop: pinctrl@390824000 {
 			             <AIC_IRQ 427 IRQ_TYPE_LEVEL_HIGH>,
 			             <AIC_IRQ 428 IRQ_TYPE_LEVEL_HIGH>,
 			             <AIC_IRQ 429 IRQ_TYPE_LEVEL_HIGH>;
+
+			apple,npins = <57>;
 		};
 
 		pinctrl_ap: pinctrl@39a000000 {
 			compatible = "apple,t8132-pinctrl", "apple,t8103-pinctrl";
 			reg = <0x3 0x9a000000 0x0 0x100000>;
-			power-domains = <&ps_gpio>;
 
-			gpio-controller;
 			#gpio-cells = <2>;
+			gpio-controller;
 			gpio-ranges = <&pinctrl_ap 0 0 224>;
-			apple,npins = <224>;
 
-			interrupt-controller;
 			#interrupt-cells = <2>;
+			interrupt-controller;
 			interrupt-parent = <&aic>;
 			interrupts = <AIC_IRQ 303 IRQ_TYPE_LEVEL_HIGH>,
 			             <AIC_IRQ 304 IRQ_TYPE_LEVEL_HIGH>,
@@ -336,6 +347,9 @@ pinctrl_ap: pinctrl@39a000000 {
 			             <AIC_IRQ 308 IRQ_TYPE_LEVEL_HIGH>,
 			             <AIC_IRQ 309 IRQ_TYPE_LEVEL_HIGH>;
 
+			power-domains = <&ps_gpio>;
+			apple,npins = <224>;
+
 			i2c0_pins: i2c0-pins {
 				pinmux = <APPLE_PINMUX(104, 1)>,
 				         <APPLE_PINMUX(103, 1)>;
@@ -365,14 +379,15 @@ i2c4_pins: i2c4-pins {
 		i2c0: i2c@3ad010000 {
 			compatible = "apple,t8132-i2c", "apple,t8103-i2c";
 			reg = <0x3 0xad010000 0x0 0x4000>;
+
+			#address-cells = <0x1>;
 			clocks = <&clkref>;
 			interrupt-parent = <&aic>;
 			interrupts = <AIC_IRQ 1062 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-0 = <&i2c0_pins>;
 			pinctrl-names = "default";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
 			power-domains = <&ps_i2c0>;
+			#size-cells = <0x0>;
 
 			status = "disabled";
 		};
@@ -380,14 +395,15 @@ i2c0: i2c@3ad010000 {
 		i2c1: i2c@3ad014000 {
 			compatible = "apple,t8132-i2c", "apple,t8103-i2c";
 			reg = <0x3 0xad014000 0x0 0x4000>;
+
+			#address-cells = <0x1>;
 			clocks = <&clkref>;
 			interrupt-parent = <&aic>;
 			interrupts = <AIC_IRQ 1063 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-0 = <&i2c1_pins>;
 			pinctrl-names = "default";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
 			power-domains = <&ps_i2c1>;
+			#size-cells = <0x0>;
 
 			status = "disabled";
 		};
@@ -395,14 +411,15 @@ i2c1: i2c@3ad014000 {
 		i2c2: i2c@3ad018000 {
 			compatible = "apple,t8132-i2c", "apple,t8103-i2c";
 			reg = <0x3 0xad018000 0x0 0x4000>;
+
+			#address-cells = <0x1>;
 			clocks = <&clkref>;
 			interrupt-parent = <&aic>;
 			interrupts = <AIC_IRQ 1064 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-0 = <&i2c2_pins>;
 			pinctrl-names = "default";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
 			power-domains = <&ps_i2c2>;
+			#size-cells = <0x0>;
 
 			status = "disabled";
 		};
@@ -410,14 +427,15 @@ i2c2: i2c@3ad018000 {
 		i2c3: i2c@3ad01c000 {
 			compatible = "apple,t8132-i2c", "apple,t8103-i2c";
 			reg = <0x3 0xad01c000 0x0 0x4000>;
+
+			#address-cells = <0x1>;
 			clocks = <&clkref>;
 			interrupt-parent = <&aic>;
 			interrupts = <AIC_IRQ 1065 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-0 = <&i2c3_pins>;
 			pinctrl-names = "default";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
 			power-domains = <&ps_i2c3>;
+			#size-cells = <0x0>;
 
 			status = "disabled";
 		};
@@ -425,14 +443,15 @@ i2c3: i2c@3ad01c000 {
 		i2c4: i2c@3ad020000 {
 			compatible = "apple,t8132-i2c", "apple,t8103-i2c";
 			reg = <0x3 0xad020000 0x0 0x4000>;
+
+			#address-cells = <0x1>;
 			clocks = <&clkref>;
 			interrupt-parent = <&aic>;
 			interrupts = <AIC_IRQ 1066 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-0 = <&i2c4_pins>;
 			pinctrl-names = "default";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
 			power-domains = <&ps_i2c4>;
+			#size-cells = <0x0>;
 
 			status = "disabled";
 		};
@@ -440,8 +459,9 @@ i2c4: i2c@3ad020000 {
 		fpwm1: pwm@3ad044000 {
 			compatible = "apple,t8132-fpwm", "apple,s5l-fpwm";
 			reg = <0x3 0xad044000 0x0 0x4000>;
-			power-domains = <&ps_fpwm1>;
+
 			clocks = <&clkref>;
+			power-domains = <&ps_fpwm1>;
 			#pwm-cells = <2>;
 
 			status = "disabled";
@@ -450,12 +470,15 @@ fpwm1: pwm@3ad044000 {
 		serial0: serial@3ad200000 {
 			compatible = "apple,s5l-uart";
 			reg = <0x3 0xad200000 0x0 0x1000>;
-			reg-io-width = <4>;
-			interrupt-parent = <&aic>;
-			interrupts = <AIC_IRQ 1046 IRQ_TYPE_LEVEL_HIGH>;
+
 			clocks = <&clkref>, <&clkref>;
 			clock-names = "uart", "clk_uart_baud0";
+
+			interrupt-parent = <&aic>;
+			interrupts = <AIC_IRQ 1046 IRQ_TYPE_LEVEL_HIGH>;
+
 			power-domains = <&ps_uart0>;
+			reg-io-width = <4>;
 
 			status = "disabled";
 		};
@@ -464,11 +487,11 @@ serial0: serial@3ad200000 {
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupt-parent = <&aic>;
-		interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
 		interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
 		             <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
 		             <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
 		             <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
 	};
 };
 

-- 
2.55.0

[PATCH 3/3] dts: apple: t8132: Fix some line-length-related dt-check-style issues

[Yureka Lilian]

This fixes most `dt-check-style --mode=strict` issues related to line
length. Lines up to 82 columns are left as-is.

Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
---
 arch/arm64/boot/dts/apple/t8132-jxxx.dtsi | 3 ++-
 arch/arm64/boot/dts/apple/t8132.dtsi      | 9 ++++++---
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi
index 09ab380a00e9..108c546545d5 100644
--- a/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi
+++ b/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi
@@ -22,7 +22,8 @@ chosen {
 		stdout-path = "serial0";
 
 		framebuffer0: framebuffer@0 {
-			compatible = "apple,simple-framebuffer", "simple-framebuffer";
+			compatible = "apple,simple-framebuffer",
+			             "simple-framebuffer";
 			reg = <0 0 0 0>; /* To be filled by loader */
 			power-domains = <&ps_disp_fe>, <&ps_dptx_phy>;
 			/* Format properties will be added by loader */
diff --git a/arch/arm64/boot/dts/apple/t8132.dtsi b/arch/arm64/boot/dts/apple/t8132.dtsi
index 350ad7b3772b..76e96846c695 100644
--- a/arch/arm64/boot/dts/apple/t8132.dtsi
+++ b/arch/arm64/boot/dts/apple/t8132.dtsi
@@ -216,7 +216,8 @@ soc: soc {
 		#size-cells = <2>;
 
 		pmgr: power-management@380700000 {
-			compatible = "apple,t8132-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";
+			compatible = "apple,t8132-pmgr", "apple,t8103-pmgr",
+			             "syscon", "simple-mfd";
 			reg = <0x3 0x80700000 0 0x14000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
@@ -234,7 +235,8 @@ aic: interrupt-controller@381000000 {
 
 			affinities {
 				e-core-pmu-affinity {
-					cpus = <&cpu_e0 &cpu_e1 &cpu_e2 &cpu_e3 &cpu_e4 &cpu_e5>;
+					cpus = <&cpu_e0 &cpu_e1 &cpu_e2
+					       &cpu_e3 &cpu_e4 &cpu_e5>;
 					apple,fiq-index = <AIC_CPU_PMU_E>;
 				};
 
@@ -269,7 +271,8 @@ pinctrl_nub: pinctrl@3881f0000 {
 		};
 
 		pmgr_mini: power-management@388280000 {
-			compatible = "apple,t8132-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";
+			compatible = "apple,t8132-pmgr", "apple,t8103-pmgr",
+			             "syscon", "simple-mfd";
 			reg = <0x3 0x88280000 0 0x4000>;
 			#address-cells = <1>;
 			#size-cells = <1>;

-- 
2.55.0

Re: [PATCH 2/3] dts: apple: t8132: Fix ordering-related dt-check-style issues

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dts: incorrect property sorting separates #address-cells and #size-cells
--

commit 9b49add5f860afd912c50de5f1749b0ac03afeeb
Author: Yureka Lilian <yureka@cyberchaos.dev>

dts: apple: t8132: Fix ordering-related dt-check-style issues

This commit fixes dt-check-style issues related to node and property
ordering in the t8132 device tree files. It also groups cache-related
properties for better readability.

> diff --git a/arch/arm64/boot/dts/apple/t8132.dtsi b/arch/arm64/boot/dts/apple/t8132.dtsi
> index 1ea488ce6e1c1..350ad7b3772b8 100644
> --- a/arch/arm64/boot/dts/apple/t8132.dtsi
> +++ b/arch/arm64/boot/dts/apple/t8132.dtsi
[ ... ]
>  	soc: soc {
>  		compatible = "simple-bus";
> -		#address-cells = <2>;
> -		#size-cells = <2>;
>  
>  		ranges;
> +		#address-cells = <2>;
>  		nonposted-mmio;
> +		#size-cells = <2>;

[Severity: Low]
In the soc node, does this alphabetical sorting inadvertently split tightly
coupled properties? The nonposted-mmio property now sits between #address-cells
and #size-cells, separating the pair which were kept together in the base
commit.

[ ... ]
> @@ -365,14 +379,15 @@ i2c4_pins: i2c4-pins {
>  		i2c0: i2c@3ad010000 {
>  			compatible = "apple,t8132-i2c", "apple,t8103-i2c";
>  			reg = <0x3 0xad010000 0x0 0x4000>;
> +
> +			#address-cells = <0x1>;
>  			clocks = <&clkref>;
>  			interrupt-parent = <&aic>;
>  			interrupts = <AIC_IRQ 1062 IRQ_TYPE_LEVEL_HIGH>;
>  			pinctrl-0 = <&i2c0_pins>;
>  			pinctrl-names = "default";
> -			#address-cells = <0x1>;
> -			#size-cells = <0x0>;
>  			power-domains = <&ps_i2c0>;
> +			#size-cells = <0x0>;

[Severity: Low]
Similar to the soc node, does alphabetical sorting in the i2c0 node scatter
these interdependent properties? Here #size-cells is pushed to the bottom of
the property block while #address-cells is moved to the top.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260924-apple-dts-m4-dt-style-check-v1-1-3ec651d75baf@cyberchaos.dev?part=2