[PATCH 0/2] iio: adc: ad4080: add support for AD4886

[PATCH 0/2] iio: adc: ad4080: add support for AD4886

[Antoniu Miclaus]

Add support for the AD4886, a dual-channel, 14-bit, 40 MSPS SAR ADC in
the AD4080 family. The AD4886 is the dual-channel variant of the AD4086
and, like the AD4885, has two independent ADC channels, each with its
own SPI configuration interface, so the part requires two chip selects
and two io-backends. It differs from the AD4885 in resolution and
therefore uses the same maximum LVDS conversion clock count as the
AD4086.

The first patch adds the devicetree binding compatible string; the
second adds the driver support (chip ID, channel spec, chip info and
device-table entries).

Antoniu Miclaus (2):
  dt-bindings: iio: adc: ad4080: add AD4886 support
  iio: adc: ad4080: add support for AD4886

 .../bindings/iio/adc/adi,ad4080.yaml           |  2 ++
 drivers/iio/adc/ad4080.c                       | 18 ++++++++++++++++++
 2 files changed, 20 insertions(+)


base-commit: 873ba60d7f2e52a171845ca290cf366878864b1e
-- 
2.43.0

[PATCH 1/2] dt-bindings: iio: adc: ad4080: add AD4886 support

[Antoniu Miclaus]

Add AD4886 compatible string to the AD4080 devicetree binding.

The AD4886 is a dual-channel, 14-bit, 40 MSPS SAR ADC, sharing the same
register map and interface as the AD4080 family. Like the AD4885, it
requires two SPI chip selects and two io-backends for its independent
ADC channels. The AD4886 is the dual-channel variant of the AD4086 and
differs from the AD4885 in its resolution and LVDS conversion clock
count, which requires distinct chip configuration in the driver,
precluding a fallback compatible.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index c8ac92e6f8e1..e93128ad107e 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
@@ -42,6 +42,7 @@ properties:
       - adi,ad4883
       - adi,ad4884
       - adi,ad4885
+      - adi,ad4886
 
   reg:
     minItems: 1
@@ -107,6 +108,7 @@ allOf:
               - adi,ad4883
               - adi,ad4884
               - adi,ad4885
+              - adi,ad4886
     then:
       properties:
         reg:
-- 
2.43.0

Re: [PATCH 1/2] dt-bindings: iio: adc: ad4080: add AD4886 support

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 75 bytes --]

Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[PATCH 2/2] iio: adc: ad4080: add support for AD4886

[Antoniu Miclaus]

Add support for the AD4886, a dual-channel, 14-bit, 40 MSPS SAR ADC.

The AD4886 is the dual-channel variant of the AD4086, sharing the same
register map and SPI interface as the rest of the AD4080 family. Like
the AD4885, it uses two independent ADC channels, each with its own SPI
configuration interface, but it has 14-bit resolution and therefore uses
the same maximum LVDS conversion clock count as the AD4086.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 drivers/iio/adc/ad4080.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 4ed82aa42400..19d4d0dfd13a 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -138,6 +138,7 @@
 #define AD4883_CHIP_ID						0x005B
 #define AD4884_CHIP_ID						0x005C
 #define AD4885_CHIP_ID						0x005D
+#define AD4886_CHIP_ID						0x005E
 
 #define AD4080_MAX_CHANNELS					2
 
@@ -567,6 +568,11 @@ static const struct iio_chan_spec ad4885_channels[] = {
 	AD4880_CHANNEL_DEFINE(16, 16, 1),
 };
 
+static const struct iio_chan_spec ad4886_channels[] = {
+	AD4880_CHANNEL_DEFINE(14, 16, 0),
+	AD4880_CHANNEL_DEFINE(14, 16, 1),
+};
+
 static const struct ad4080_chip_info ad4080_chip_info = {
 	.name = "ad4080",
 	.product_id = AD4080_CHIP_ID,
@@ -697,6 +703,16 @@ static const struct ad4080_chip_info ad4885_chip_info = {
 	.lvds_cnv_clk_cnt_max = 8,
 };
 
+static const struct ad4080_chip_info ad4886_chip_info = {
+	.name = "ad4886",
+	.product_id = AD4886_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 2,
+	.channels = ad4886_channels,
+	.lvds_cnv_clk_cnt_max = 4,
+};
+
 static int ad4080_setup_channel(struct ad4080_state *st, unsigned int ch)
 {
 	struct device *dev = regmap_get_device(st->regmap[ch]);
@@ -908,6 +924,7 @@ static const struct spi_device_id ad4080_id[] = {
 	{ .name = "ad4883", .driver_data = (kernel_ulong_t)&ad4883_chip_info },
 	{ .name = "ad4884", .driver_data = (kernel_ulong_t)&ad4884_chip_info },
 	{ .name = "ad4885", .driver_data = (kernel_ulong_t)&ad4885_chip_info },
+	{ .name = "ad4886", .driver_data = (kernel_ulong_t)&ad4886_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(spi, ad4080_id);
@@ -926,6 +943,7 @@ static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4883", &ad4883_chip_info },
 	{ .compatible = "adi,ad4884", &ad4884_chip_info },
 	{ .compatible = "adi,ad4885", &ad4885_chip_info },
+	{ .compatible = "adi,ad4886", &ad4886_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, ad4080_of_match);
-- 
2.43.0