From: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Abel Vesa <abelvesa@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: aiqun.yu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com,
trilok.soni@oss.qualcomm.com, yijie.yang@oss.qualcomm.com,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Jingyi Wang <jingyi.wang@oss.qualcomm.com>,
Chunkai Deng <chunkai.deng@oss.qualcomm.com>
Subject: [PATCH v2 2/5] arm64: dts: qcom: Add header file for IPCC physical client IDs for Maili platforms
Date: Tue, 29 Sep 2026 23:31:24 -0700 [thread overview]
Message-ID: <20260929-maili-dts-v2-2-965688646c4b@oss.qualcomm.com> (raw)
In-Reply-To: <20260929-maili-dts-v2-0-965688646c4b@oss.qualcomm.com>
From: Chunkai Deng <chunkai.deng@oss.qualcomm.com>
Physical client IDs are used on Maili Inter Process Communication
Controller (IPCC), add a corresponding header file.
Signed-off-by: Chunkai Deng <chunkai.deng@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/maili-ipcc.h | 62 +++++++++++++++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/maili-ipcc.h b/arch/arm64/boot/dts/qcom/maili-ipcc.h
new file mode 100644
index 000000000000..7cf66d20e9c1
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/maili-ipcc.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef __DTS_MAILI_MAILBOX_IPCC_H
+#define __DTS_MAILI_MAILBOX_IPCC_H
+
+/* Physical client IDs */
+#define IPCC_MPROC_AOP 0
+#define IPCC_MPROC_TZ 1
+#define IPCC_MPROC_MPSS 2
+#define IPCC_MPROC_LPASS 3
+#define IPCC_MPROC_SDC 4
+#define IPCC_MPROC_CDSP 5
+#define IPCC_MPROC_APSS 6
+#define IPCC_MPROC_SOCCP 12
+#define IPCC_MPROC_DCP 13
+#define IPCC_MPROC_QECP 14
+#define IPCC_MPROC_SPSS 15
+#define IPCC_MPROC_TME 16
+#define IPCC_MPROC_WPSS 17
+
+#define IPCC_COMPUTE_L0_LPASS 1
+#define IPCC_COMPUTE_L0_CDSP 2
+#define IPCC_COMPUTE_L0_APSS 3
+#define IPCC_COMPUTE_L0_GPU 4
+#define IPCC_COMPUTE_L0_CVP 8
+#define IPCC_COMPUTE_L0_CAM 9
+#define IPCC_COMPUTE_L0_CAM1 10
+#define IPCC_COMPUTE_L0_DCP 11
+#define IPCC_COMPUTE_L0_VPU 12
+#define IPCC_COMPUTE_L0_SOCCP 16
+
+#define IPCC_COMPUTE_L1_LPASS 1
+#define IPCC_COMPUTE_L1_CDSP 2
+#define IPCC_COMPUTE_L1_APSS 3
+#define IPCC_COMPUTE_L1_GPU 4
+#define IPCC_COMPUTE_L1_CVP 8
+#define IPCC_COMPUTE_L1_CAM 9
+#define IPCC_COMPUTE_L1_CAM1 10
+#define IPCC_COMPUTE_L1_DCP 11
+#define IPCC_COMPUTE_L1_VPU 12
+#define IPCC_COMPUTE_L1_SOCCP 16
+
+#define IPCC_PERIPH_CDSP 2
+#define IPCC_PERIPH_APSS 3
+#define IPCC_PERIPH_PCIE0 4
+#define IPCC_PERIPH_PCIE1 15
+
+#define IPCC_FENCE_LPASS 1
+#define IPCC_FENCE_CDSP 2
+#define IPCC_FENCE_APSS 3
+#define IPCC_FENCE_GPU 4
+#define IPCC_FENCE_CVP 8
+#define IPCC_FENCE_CAM 9
+#define IPCC_FENCE_CAM1 10
+#define IPCC_FENCE_DCP 11
+#define IPCC_FENCE_VPU 20
+#define IPCC_FENCE_SOCCP 24
+
+#endif
--
2.34.1
next prev parent reply other threads:[~2026-09-30 6:31 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-30 6:31 [PATCH v2 0/5] arm64: dts: qcom: Introduce Maili platform device tree Jingyi Wang
2026-09-30 6:31 ` [PATCH v2 1/5] dt-bindings: arm: qcom: Document Maili SoC and its reference board Jingyi Wang
2026-09-30 6:31 ` Jingyi Wang [this message]
2026-09-30 6:31 ` [PATCH v2 3/5] arm64: dts: qcom: Introduce Maili SoC Jingyi Wang
2026-09-30 6:49 ` sashiko-bot
2026-09-30 6:31 ` [PATCH v2 4/5] arm64: dts: qcom: Add PMIC support for Maili platforms Jingyi Wang
2026-09-30 6:31 ` [PATCH v2 5/5] arm64: dts: qcom: maili: Add base MTP board Jingyi Wang
2026-09-30 6:40 ` sashiko-bot
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