[PATCH v2 0/3] pinctrl: sunxi: number the IRQ banks from the first one that has IRQs

[PATCH v2 0/3] pinctrl: sunxi: number the IRQ banks from the first one that has IRQs

[Pablo Mazzini]

The DT pinctrl helper numbers the IRQ banks from PA, even when PA has
none. The A523 got a DT interrupt for its unimplemented PA bank to work
around that, the A733 would need the same, and on both PK is written
past the end of irq_array.

Number the IRQ banks like the static drivers do, with irq_bank_map for
the A523 and A733, and drop the PA interrupt from the binding and the
A523 DT. The B288 (IRQ banks on PB, PD, PF and PG) then needs no
made-up interrupt.

v2:
- give the A523 and A733 an irq_bank_map, and drop the PA interrupt
  from the binding and the A523 DT

Pablo Mazzini (3):
  pinctrl: sunxi: dt: number the IRQ banks from the first one that has
    IRQs
  dt-bindings: pinctrl: sun55i-a523: one interrupt per implemented bank
  arm64: dts: allwinner: a523: drop the PA GPIO interrupt

 .../bindings/pinctrl/allwinner,sun55i-a523-pinctrl.yaml   | 8 ++++----
 arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi            | 3 +--
 drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c               | 2 +-
 drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c               | 5 ++++-
 drivers/pinctrl/sunxi/pinctrl-sunxi-dt.c                  | 8 +++-----
 5 files changed, 13 insertions(+), 13 deletions(-)


base-commit: 4f0dbdbdb3ad122e8bbfb1d722fd584bac7124db
-- 
2.52.0

[PATCH v2 2/3] dt-bindings: pinctrl: sun55i-a523: one interrupt per implemented bank

[Pablo Mazzini]

The A523 and A733 have no PA pins, the A523's PA IRQ bank is not
implemented, and the driver no longer counts it. Go back to one
interrupt, and one debounce period, per implemented bank: 10 for both.

This reverts commit 11f25ac56372 ("dt-bindings: pinctrl: sun55i-a523:
increase IRQ banks number").

Signed-off-by: Pablo Mazzini <pmazzini@gmail.com>
---
 .../bindings/pinctrl/allwinner,sun55i-a523-pinctrl.yaml   | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sun55i-a523-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/allwinner,sun55i-a523-pinctrl.yaml
index d7d0ba32ced4..c04b04acf6e4 100644
--- a/Documentation/devicetree/bindings/pinctrl/allwinner,sun55i-a523-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sun55i-a523-pinctrl.yaml
@@ -36,7 +36,7 @@ properties:
 
   interrupts:
     minItems: 2
-    maxItems: 11
+    maxItems: 10
     description:
       One interrupt per external interrupt bank supported on the
       controller, sorted by bank number ascending order.
@@ -63,7 +63,7 @@ properties:
       bank found in the controller
     $ref: /schemas/types.yaml#/definitions/uint32-array
     minItems: 2
-    maxItems: 11
+    maxItems: 10
 
 patternProperties:
   # It's pretty scary, but the basic idea is that:
@@ -133,8 +133,8 @@ allOf:
     then:
       properties:
         interrupts:
-          minItems: 11
-          maxItems: 11
+          minItems: 10
+          maxItems: 10
 
   - if:
       properties:
-- 
2.52.0

[PATCH v2 3/3] arm64: dts: allwinner: a523: drop the PA GPIO interrupt

[Pablo Mazzini]

The PA IRQ bank is not implemented, and the driver now numbers the IRQ
banks from PB. Drop its interrupt.

This reverts commit 6b81aa0c8a4f ("arm64: dts: allwinner: a523: Add
missing GPIO interrupt").

Signed-off-by: Pablo Mazzini <pmazzini@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index 85ef492ffeae..fc4d714a96ea 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -129,8 +129,7 @@ gpu: gpu@1800000 {
 		pio: pinctrl@2000000 {
 			compatible = "allwinner,sun55i-a523-pinctrl";
 			reg = <0x2000000 0x800>;
-			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
-- 
2.52.0

Re: [PATCH v2 3/3] arm64: dts: allwinner: a523: drop the PA GPIO interrupt

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] pinctrl: sunxi: sunxi_irq_base_reg() ignores irq_bank_map on A733
--

commit 1d99efa95c547fd409284e1974176bcf35345f69
Author: Pablo Mazzini <pmazzini@gmail.com>

pinctrl: sunxi: dt: number the IRQ banks from the first one that has IRQs

This commit updates prepare_function_table() in the sunxi DT pinctrl
driver to number logical IRQ banks starting from 0 at the first bank that
supports interrupts, rather than starting from PA. It also updates
a523_irq_bank_map and adds a733_irq_bank_map to map logical IRQ banks
0..9 back to hardware banks 1..10 (PB..PK).

> diff --git a/drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c b/drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c
> index ca82f08a3a65b..3ebe926a1bc6b 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c
> @@ -21,8 +21,11 @@ static const u8 a733_irq_bank_muxes[SUNXI_PINCTRL_MAX_BANKS] =
>  /*	  PA  PB  PC  PD  PE  PF  PG  PH  PI  PJ  PK */
>  	{  0, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14};
>  
> +static const unsigned int a733_irq_bank_map[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 };
> +
>  static struct sunxi_pinctrl_desc a733_pinctrl_data = {
> -	.irq_banks = 10,
> +	.irq_banks = ARRAY_SIZE(a733_irq_bank_map),
> +	.irq_bank_map = a733_irq_bank_map,
>  	.irq_read_needs_mux = true,
>  	.io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL,
>  };

[Severity: High]
Does sunxi_irq_base_reg() in drivers/pinctrl/sunxi/pinctrl-sunxi.h ignore
a733_irq_bank_map when SUNXI_PINCTRL_NCAT3_REG_LAYOUT is set?

In drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c, a733_pinctrl_probe() passes
SUNXI_PINCTRL_NCAT3_REG_LAYOUT to sunxi_pinctrl_dt_table_init(). However,
when accessing IRQ registers via sunxi_irq_cfg_reg(), sunxi_irq_ctrl_reg(),
sunxi_irq_status_reg(), or sunxi_irq_debounce_reg(), sunxi_irq_base_reg()
only calls sunxi_irq_hw_bank_num() on the non-NCAT3 path:

drivers/pinctrl/sunxi/pinctrl-sunxi.h:sunxi_irq_base_reg() {
	if (pctl->flags & SUNXI_PINCTRL_NCAT3_REG_LAYOUT)
		return pctl->bank_offset + bank * pctl->bank_mem_size +
		       A733_IRQ_REGS_OFFSET;

	return IRQ_REGS_OFFSET +
	       sunxi_irq_hw_bank_num(pctl->desc, bank) * IRQ_MEM_SIZE;
}

With prepare_function_table() in drivers/pinctrl/sunxi/pinctrl-sunxi-dt.c
now numbering PB..PK as logical IRQ banks 0..9 instead of 1..10, and
pctl->bank_offset set to A733_BANK_OFFSET (0x80, the base of PA),
passing the unmapped bank index in the SUNXI_PINCTRL_NCAT3_REG_LAYOUT
branch shifts every GPIO IRQ register access on the A733 down by one bank
(0x80 bytes), so PB..PK access offsets 0x0c0..0x540 (PA..PJ) instead of
0x140..0x5c0.

Should the SUNXI_PINCTRL_NCAT3_REG_LAYOUT branch in sunxi_irq_base_reg()
also translate bank through sunxi_irq_hw_bank_num(pctl->desc, bank)?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261025135745.102970-1-pmazzini@gmail.com?part=3

Re: [PATCH v2 3/3] arm64: dts: allwinner: a523: drop the PA GPIO interrupt

[Pablo Mazzini]

I'll fix it in v3.

On Sun, Oct 25, 2026 at 2:06 PM <sashiko-bot@kernel.org> wrote:
>
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] pinctrl: sunxi: sunxi_irq_base_reg() ignores irq_bank_map on A733
> --
>
> commit 1d99efa95c547fd409284e1974176bcf35345f69
> Author: Pablo Mazzini <pmazzini@gmail.com>
>
> pinctrl: sunxi: dt: number the IRQ banks from the first one that has IRQs
>
> This commit updates prepare_function_table() in the sunxi DT pinctrl
> driver to number logical IRQ banks starting from 0 at the first bank that
> supports interrupts, rather than starting from PA. It also updates
> a523_irq_bank_map and adds a733_irq_bank_map to map logical IRQ banks
> 0..9 back to hardware banks 1..10 (PB..PK).
>
> > diff --git a/drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c b/drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c
> > index ca82f08a3a65b..3ebe926a1bc6b 100644
> > --- a/drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c
> > +++ b/drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c
> > @@ -21,8 +21,11 @@ static const u8 a733_irq_bank_muxes[SUNXI_PINCTRL_MAX_BANKS] =
> >  /*     PA  PB  PC  PD  PE  PF  PG  PH  PI  PJ  PK */
> >       {  0, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14};
> >
> > +static const unsigned int a733_irq_bank_map[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 };
> > +
> >  static struct sunxi_pinctrl_desc a733_pinctrl_data = {
> > -     .irq_banks = 10,
> > +     .irq_banks = ARRAY_SIZE(a733_irq_bank_map),
> > +     .irq_bank_map = a733_irq_bank_map,
> >       .irq_read_needs_mux = true,
> >       .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL,
> >  };
>
> [Severity: High]
> Does sunxi_irq_base_reg() in drivers/pinctrl/sunxi/pinctrl-sunxi.h ignore
> a733_irq_bank_map when SUNXI_PINCTRL_NCAT3_REG_LAYOUT is set?
>
> In drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c, a733_pinctrl_probe() passes
> SUNXI_PINCTRL_NCAT3_REG_LAYOUT to sunxi_pinctrl_dt_table_init(). However,
> when accessing IRQ registers via sunxi_irq_cfg_reg(), sunxi_irq_ctrl_reg(),
> sunxi_irq_status_reg(), or sunxi_irq_debounce_reg(), sunxi_irq_base_reg()
> only calls sunxi_irq_hw_bank_num() on the non-NCAT3 path:
>
> drivers/pinctrl/sunxi/pinctrl-sunxi.h:sunxi_irq_base_reg() {
>         if (pctl->flags & SUNXI_PINCTRL_NCAT3_REG_LAYOUT)
>                 return pctl->bank_offset + bank * pctl->bank_mem_size +
>                        A733_IRQ_REGS_OFFSET;
>
>         return IRQ_REGS_OFFSET +
>                sunxi_irq_hw_bank_num(pctl->desc, bank) * IRQ_MEM_SIZE;
> }
>
> With prepare_function_table() in drivers/pinctrl/sunxi/pinctrl-sunxi-dt.c
> now numbering PB..PK as logical IRQ banks 0..9 instead of 1..10, and
> pctl->bank_offset set to A733_BANK_OFFSET (0x80, the base of PA),
> passing the unmapped bank index in the SUNXI_PINCTRL_NCAT3_REG_LAYOUT
> branch shifts every GPIO IRQ register access on the A733 down by one bank
> (0x80 bytes), so PB..PK access offsets 0x0c0..0x540 (PA..PJ) instead of
> 0x140..0x5c0.
>
> Should the SUNXI_PINCTRL_NCAT3_REG_LAYOUT branch in sunxi_irq_base_reg()
> also translate bank through sunxi_irq_hw_bank_num(pctl->desc, bank)?
>
> --
> Sashiko AI review · https://sashiko.dev/#/patchset/20261025135745.102970-1-pmazzini@gmail.com?part=3