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From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Paul Elder <paul.elder+renesas@ideasonboard.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
	Stephen Boyd <sboyd@kernel.org>,
	Brian Masney <bmasney+clk@redhat.com>,
	Jerome Brunet <jbrunet+clk@baylibre.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Magnus Damm <magnus.damm@gmail.com>,
	Ulf Hansson <ulfh@kernel.org>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
	linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-media@vger.kernel.org
Subject: Re: [PATCH v3 13/15] dt-bindings: Increase Renesas X5H MDLC PD specifier bit width
Date: Fri, 30 Oct 2026 23:28:58 +0200	[thread overview]
Message-ID: <20261030212858.GA3178046@killaraus.ideasonboard.com> (raw)
In-Reply-To: <20261015-epaul-v7-3-rc1-x5h-vsp-fcp-v3-13-e052903a3832@ideasonboard.com>

On Thu, Oct 15, 2026 at 04:51:53PM +0900, Paul Elder wrote:
> In the Renesas R-Car X5H, the module controller's power domain specifier
> cell's bit width has been increased. Update the bindings documentation
> to reflect this.
> 
> Signed-off-by: Paul Elder <paul.elder+renesas@ideasonboard.com>
> ---
> I'm guessing that the maximum number is now 512 but I can't find
> definite proof of this.
> ---
>  Documentation/devicetree/bindings/power/renesas,r8a78000-mdlc.yaml | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/power/renesas,r8a78000-mdlc.yaml b/Documentation/devicetree/bindings/power/renesas,r8a78000-mdlc.yaml
> index 27d85dd49f9546230ba9632aaa324986261d2156..644b07a07955b98b1832074eefcfd63eb6d45adb 100644
> --- a/Documentation/devicetree/bindings/power/renesas,r8a78000-mdlc.yaml
> +++ b/Documentation/devicetree/bindings/power/renesas,r8a78000-mdlc.yaml
> @@ -12,7 +12,8 @@ maintainers:
>  description:
>    Each instance of the R-Car X5H Module Controller (MODULE CONTROL) provides
>    Power Gating for up to 64 Power Domains, and Module Standby and Reset for up
> -  to 256 modules in the Power Domain of each Module hierarchy.
> +  to 256 modules in the Power Domain of each Module hierarchy. Recent hardware
> +  versions have increased the number of supported modules.
>  
>  properties:
>    compatible:
> @@ -32,14 +33,14 @@ properties:
>          are always on, and for which there are no MPDG bits to control them.
>  
>        - The second power domain specifier cell is the module standby part, and
> -        must be the module number (0x00-0xff), composed of the Module System
> +        must be the module number (0x00-0x1ff), composed of the Module System
>          Reset (MSRES) register index in the high nibble, and the Module Reset

Technically it's high nibble plus one bit, but I think this is fine
as-is.

Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

>          Destination bitfield index in the low nibble.
>      const: 2
>  
>    '#reset-cells':
>      description:
> -      The single reset specifier cell must be the module number (0x00-0xff),
> +      The single reset specifier cell must be the module number (0x00-0x1ff),
>        and thus identical to the second power domain specifier cell.
>      const: 1
>  

-- 
Regards,

Laurent Pinchart

  parent reply	other threads:[~2026-10-30 21:29 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-15  7:51 [PATCH DNI v3 00/15] media: rcar-fcp, vsp1: Enable on R-Car X5H Paul Elder
2026-10-15  7:51 ` [PATCH DNI v3 01/15] dt-bindings: clock: renesas,r8a78000-cpg: Add CPG_SGD4_VIO_DP_{TX,OTHER} Paul Elder
2026-10-30 21:57   ` Laurent Pinchart
2026-10-15  7:51 ` [PATCH DNI v3 02/15] clk: renesas: r8a78000: Add clock for FCPV and VSP for SCP FW SDKv4.36 Paul Elder
2026-10-15  7:51 ` [PATCH DNI v3 03/15] pmdomain: renesas: r8a78000: Add maps for VIO " Paul Elder
2026-10-30 22:05   ` Laurent Pinchart
2026-10-15  7:51 ` [PATCH DNI v3 04/15] arm64: renesas: r8a78000: Add FCPV[BI] nodes Paul Elder
2026-10-30 21:12   ` Laurent Pinchart
2026-10-15  7:51 ` [PATCH DNI v3 05/15] arm64: renesas: r8a78000: Add VSP[BI] nodes Paul Elder
2026-10-30 21:38   ` Laurent Pinchart
2026-10-15  7:51 ` [PATCH DNI v3 06/15] arm64: renesas: r8a78000: Add FCPVD and VSPD nodes Paul Elder
2026-10-30 21:42   ` Laurent Pinchart
2026-10-15  7:51 ` [PATCH v3 07/15] media: vsp1: Support full VSPB on R-Car M3-W, M3-N and E3 Paul Elder
2026-10-15  7:51 ` [PATCH v3 08/15] media: vsp1: Add device info entries for VSPD on X5H Paul Elder
2026-10-15  7:51 ` [PATCH v3 09/15] media: rcar-fcp: Handle resets Paul Elder
2026-10-15  7:51 ` [PATCH v3 10/15] media: vsp1: Fix access to reserved registers Paul Elder
2026-10-30 21:34   ` Laurent Pinchart
2026-10-15  7:51 ` [PATCH v3 11/15] media: vsp1: Fix du_complete race condition issue Paul Elder
2026-10-15  7:51 ` [PATCH v3 12/15] media: vsp1: Fix setting control register by display list Paul Elder
2026-10-30 21:51   ` Laurent Pinchart
2026-10-15  7:51 ` [PATCH v3 13/15] dt-bindings: Increase Renesas X5H MDLC PD specifier bit width Paul Elder
2026-10-17 16:36   ` Krzysztof Kozlowski
2026-10-30 21:28   ` Laurent Pinchart [this message]
2026-10-15  7:51 ` [PATCH v3 14/15] media: vsp1: Complete buffers as queued in start_streaming error path Paul Elder
2026-10-30 21:53   ` Laurent Pinchart
2026-10-15  7:51 ` [PATCH DNI v3 15/15] media: rcar-fcp: Check device revision at probe time Paul Elder
2026-10-20 12:20   ` Geert Uytterhoeven
2026-10-30 22:02     ` Laurent Pinchart
2026-10-20 13:22   ` Geert Uytterhoeven

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