Re: [PATCH DNI v3 01/15] dt-bindings: clock: renesas,r8a78000-cpg: Add CPG_SGD4_VIO_DP_{TX,OTHER}

[Laurent Pinchart <laurent.pinchart@ideasonboard.com>]

Hi Paul,

Thank you for the patch.

On Thu, Oct 15, 2026 at 04:51:41PM +0900, Paul Elder wrote:
> Add the CPG_SGD4_VIO_DP_TX and CPG_SGD4_VIO_DP_OTHER clocks. The former
> is used by FCPV{B,D,I} and VSPD while the latter is used by VSP{B,I} on
> the Renesas R-Car X5H.

The comment message should probably be updated based on the discussion
in 04/15.

> Signed-off-by: Paul Elder <paul.elder+renesas@ideasonboard.com>
> ---
>  include/dt-bindings/clock/renesas,r8a78000-cpg.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/include/dt-bindings/clock/renesas,r8a78000-cpg.h b/include/dt-bindings/clock/renesas,r8a78000-cpg.h
> index 5851a29847f961b9b4ec270f263eb3aa19e45308..8c1a01e28ddbb26c583d7c9b387400ef6626c06c 100644
> --- a/include/dt-bindings/clock/renesas,r8a78000-cpg.h
> +++ b/include/dt-bindings/clock/renesas,r8a78000-cpg.h
> @@ -12,5 +12,7 @@
>  #define R8A78000_CPG_SGASYNCD16_PERW_BUS	2
>  #define R8A78000_CPG_S0D4_PERE_MAIN		3	// FIXME Preliminary
>  #define R8A78000_CPG_MSOCK_PERW_BUS		4	// FIXME Preliminary
> +#define R8A78000_CPG_SGD4_VIO_DP_TX		5	// FIXME Preliminary
> +#define R8A78000_CPG_SGD4_VIO_DP_OTHER		6	// FIXME Preliminary

Rebasing the next version on top of Geert's v4 of the CPG, those won't
be preliminary any more \o/

Please define all SGD clocks in one go (see the discussion in [1]).

[1] https://lore.kernel.org/all/e723696e02cfb34fb808e2ae3ccb6faf68528c00.1793026273.git.geert+renesas@glider.be

>  
>  #endif /* __DT_BINDINGS_CLOCK_RENESAS_R8A78000_CPG_H__ */
> 

-- 
Regards,

Laurent Pinchart