Re: [PATCH 2/3] dt-bindings: spmi: Add SmartDV SPMI controller

[Conor Dooley <conor@kernel.org>]

[-- Attachment #1: Type: text/plain, Size: 6751 bytes --]

On Tue, Nov 03, 2026 at 09:56:06AM +0530, vamshi gajjela wrote:
> From: Vamshi Gajjela <vamshigajjela@google.com>
> 
> Document the device tree bindings for the SmartDV IP Solutions MIPI SPMI
> master controller ("smartdv,spmi").
> 
> This controller IP is integrated in Google Tensor SoCs starting with the
> G5 generation (codename: laguna, canonically written as "lga"), so add
> "google,lga-spmi" with a fallback to "smartdv,spmi".
> 
> Signed-off-by: Vamshi Gajjela <vamshigajjela@google.com>
> ---
>  .../bindings/spmi/smartdv,spmi.yaml           | 126 ++++++++++++++++++
>  MAINTAINERS                                   |   6 +
>  2 files changed, 132 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/spmi/smartdv,spmi.yaml
> 
> diff --git a/Documentation/devicetree/bindings/spmi/smartdv,spmi.yaml b/Documentation/devicetree/bindings/spmi/smartdv,spmi.yaml
> new file mode 100644
> index 000000000000..e0512e60d932
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spmi/smartdv,spmi.yaml
> @@ -0,0 +1,126 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spmi/smartdv,spmi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SmartDV IP Solutions SPMI Controller
> +
> +maintainers:
> +  - Vamshi Gajjela <vamshigajjela@google.com>
> +
> +description:
> +  SmartDV IP Solutions MIPI System Power Management Interface (SPMI) master
> +  controller supporting MIPI SPMI Specification versions 1.0 and 2.0.
> +
> +allOf:
> +  - $ref: spmi.yaml#
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: google,lga-spmi

> +          - const: smartdv,spmi
> +      - const: smartdv,spmi

I hate compatibles for purchasable IP like this, particularly when
unversioned as they maybe become effectively useless when a new revision
releases. The standalone smartdv,spmi compatible has to go at least,
soc-specific compatibles are mandatory.

> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    description:
> +      Core clock to the controller from which SPMI SCL is derived. Optional if
> +      the controller uses a free-running clock and clock-frequency is specified.
> +    maxItems: 1
> +
> +  resets:
> +    maxItems: 1
> +
> +  clock-frequency:
> +    description:
> +      Input core clock frequency in Hz when the controller uses a free-running
> +      clock not described in clocks.
> +
> +  smartdv,master-arb-enable:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [0, 1]
> +    default: 0
> +    description:
> +      Enable master bus arbitration phase (0 = disable, 1 = enable).

What aspect of board design governs the decision here?
Why can it not be determined from the soc specific compatible?

> +
> +  smartdv,master-id:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 3
> +    default: 0
> +    description:
> +      Master ID for the controller on the SPMI bus.

What aspect of board design governs the decision here?
Why can it not be determined from the soc specific compatible?


> +
> +  smartdv,spmi-version:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [0, 1]
> +    default: 0
> +    description:
> +      MIPI SPMI specification version used for transfers (0 for MIPI SPMI v1.0,
> +      1 for MIPI SPMI v2.0).

What aspect of board design governs the decision here?
Why can it not be determined from the soc specific compatible?


> +
> +  smartdv,arb-retry-limit:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 255
> +    default: 32
> +    description:
> +      Maximum number of times the master retries a command when losing bus
> +      arbitration.

What aspect of board design governs the decision here?
Why can it not be determined from the soc specific compatible?


> +
> +  smartdv,prescaler:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 255
> +    default: 0
> +    description:
> +      Clock divider value to generate SPMI SCL from the input core clock. Writing
> +      1 divides the system clock by 2; more generally, a non-zero value n
> +      divides the system clock by 2 * n.

What aspect of board design governs the decision here?
Why can it not be determined from the soc specific compatible?


> +
> +  smartdv,read-latency:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 255
> +    default: 32
> +    description:
> +      Number of SPMI SCL clock cycles to pause during bus turnaround on read
> +      commands to allow the target device to fetch data.

What aspect of board design governs the decision here?
Why can it not be determined from the soc specific compatible?


> +
> +  smartdv,arb-scl-delay:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 3
> +    default: 0
> +    description:
> +      Delay between arbitration and Sequence Start Condition (SSC) when the
> +      controller is the Bus Owner Master (BOM).

What aspect of board design governs the decision here?
Why can it not be determined from the soc specific compatible?


> +
> +required:
> +  - compatible
> +  - reg

I find it hard to believe that this is the set of required properties.

pw-bot: changes-requested

Thanks,
Conor.

> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/spmi/spmi.h>
> +
> +    spmi@14853000 {
> +        compatible = "google,lga-spmi", "smartdv,spmi";
> +        reg = <0x14853000 0x100>;
> +        #address-cells = <2>;
> +        #size-cells = <0>;
> +        clock-frequency = <19200000>;
> +        smartdv,master-arb-enable = <1>;
> +        smartdv,spmi-version = <1>;
> +
> +        pmic@f {
> +            reg = <0xf SPMI_USID>;
> +        };
> +    };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index eaeb60c1e1c2..f44c597c2075 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -25243,6 +25243,12 @@ T:	git https://github.com/cschaufler/smack-next.git
>  F:	Documentation/admin-guide/LSM/Smack.rst
>  F:	security/smack/
>  
> +SMARTDV SPMI CONTROLLER DRIVER
> +M:	Vamshi Gajjela <vamshigajjela@google.com>
> +L:	linux-kernel@vger.kernel.org
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/spmi/smartdv,spmi.yaml
> +
>  SMBDIRECT (RDMA Stream Transport with Read/Write-Offload, MS-SMBD)
>  M:	Steve French <smfrench@gmail.com>
>  M:	Steve French <sfrench@samba.org>
> -- 
> 2.56.0.317.g454f8302e1-goog
> 

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]