* [PATCH] dt-bindings: opp: Allow 'clock-latency' with dynamically populated OPPs
@ 2026-11-03 22:45 Rob Herring (Arm)
2026-11-04 4:14 ` Viresh Kumar
0 siblings, 1 reply; 2+ messages in thread
From: Rob Herring (Arm) @ 2026-11-03 22:45 UTC (permalink / raw)
To: Thierry Reding, Viresh Kumar, Nishanth Menon, Stephen Boyd,
Krzysztof Kozlowski, Conor Dooley, Sudeep Holla,
AngeloGioacchino Del Regno
Cc: Viresh Kumar, linux-pm, devicetree, linux-kernel
Tegra210 builds its CPU OPP table at runtime from fuse-derived process
and speedo values and built-in CVB coefficients. Its CPU node therefore
has clock-latency without a static operating-points property. The OPP
core still reads that latency when initializing the table.
Fixes: 80728bfa8c79 ("dt-bindings: arm/cpus: Add missing properties")
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
Documentation/devicetree/bindings/opp/opp-v1.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/opp/opp-v1.yaml b/Documentation/devicetree/bindings/opp/opp-v1.yaml
index 61c080e50859..3dca8f7f146d 100644
--- a/Documentation/devicetree/bindings/opp/opp-v1.yaml
+++ b/Documentation/devicetree/bindings/opp/opp-v1.yaml
@@ -24,7 +24,8 @@ properties:
clock-latency:
$ref: /schemas/types.yaml#/definitions/uint32
description:
- The latency in nanoseconds for clock changes. Use OPP tables for new
+ The latency in nanoseconds for clock changes. This also applies when
+ operating points are populated dynamically. Use OPP tables for new
designs instead.
voltage-tolerance:
@@ -41,7 +42,6 @@ properties:
- description: Voltage for OPP in uV
dependencies:
- clock-latency: [ operating-points ]
voltage-tolerance: [ operating-points ]
additionalProperties: true
--
2.53.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] dt-bindings: opp: Allow 'clock-latency' with dynamically populated OPPs
2026-11-03 22:45 [PATCH] dt-bindings: opp: Allow 'clock-latency' with dynamically populated OPPs Rob Herring (Arm)
@ 2026-11-04 4:14 ` Viresh Kumar
0 siblings, 0 replies; 2+ messages in thread
From: Viresh Kumar @ 2026-11-04 4:14 UTC (permalink / raw)
To: Rob Herring (Arm)
Cc: Thierry Reding, Viresh Kumar, Nishanth Menon, Stephen Boyd,
Krzysztof Kozlowski, Conor Dooley, Sudeep Holla,
AngeloGioacchino Del Regno, linux-pm, devicetree, linux-kernel
On 03-11-26, 16:45, Rob Herring (Arm) wrote:
> Tegra210 builds its CPU OPP table at runtime from fuse-derived process
> and speedo values and built-in CVB coefficients. Its CPU node therefore
> has clock-latency without a static operating-points property. The OPP
> core still reads that latency when initializing the table.
>
> Fixes: 80728bfa8c79 ("dt-bindings: arm/cpus: Add missing properties")
> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
> ---
> Documentation/devicetree/bindings/opp/opp-v1.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/opp/opp-v1.yaml b/Documentation/devicetree/bindings/opp/opp-v1.yaml
> index 61c080e50859..3dca8f7f146d 100644
> --- a/Documentation/devicetree/bindings/opp/opp-v1.yaml
> +++ b/Documentation/devicetree/bindings/opp/opp-v1.yaml
> @@ -24,7 +24,8 @@ properties:
> clock-latency:
> $ref: /schemas/types.yaml#/definitions/uint32
> description:
> - The latency in nanoseconds for clock changes. Use OPP tables for new
> + The latency in nanoseconds for clock changes. This also applies when
> + operating points are populated dynamically. Use OPP tables for new
> designs instead.
>
> voltage-tolerance:
> @@ -41,7 +42,6 @@ properties:
> - description: Voltage for OPP in uV
>
> dependencies:
> - clock-latency: [ operating-points ]
> voltage-tolerance: [ operating-points ]
>
> additionalProperties: true
Applied. Thanks.
--
viresh
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