* [PATCH v5 1/2] dt-bindings: clock: sun4i-a10-ccu: add Allwinner B288
2026-11-13 15:49 [PATCH v5 0/2] clk: sunxi-ng: add the Allwinner B288 CCU Pablo Mazzini
@ 2026-11-13 15:49 ` Pablo Mazzini
0 siblings, 0 replies; 2+ messages in thread
From: Pablo Mazzini @ 2026-11-13 15:49 UTC (permalink / raw)
To: Brian Masney, Chen-Yu Tsai, Conor Dooley, Jernej Skrabec,
Jerome Brunet, Krzysztof Kozlowski, Maxime Ripard, Philipp Zabel,
Rob Herring, Samuel Holland, Stephen Boyd
Cc: Pablo Mazzini, Krzysztof Kozlowski, Andre Przywara, devicetree,
linux-arm-kernel, linux-clk, linux-kernel, linux-sunxi
The B288 (sun8iw10p1) is a dual Cortex-A7 SoC used in e-book readers.
Its CCU needs only the two oscillator inputs, so it fits the existing
schema without changes.
Signed-off-by: Pablo Mazzini <pmazzini@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
v5: renamed some clocks and resets to the names the other sunxi-ng
bindings use; only names changed, so I kept the Ack.
---
.../clock/allwinner,sun4i-a10-ccu.yaml | 1 +
include/dt-bindings/clock/sun8i-b288-ccu.h | 82 +++++++++++++++++++
include/dt-bindings/reset/sun8i-b288-ccu.h | 45 ++++++++++
3 files changed, 128 insertions(+)
create mode 100644 include/dt-bindings/clock/sun8i-b288-ccu.h
create mode 100644 include/dt-bindings/reset/sun8i-b288-ccu.h
diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml
index 1690b9d99c3d..cc3f62d3554c 100644
--- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml
+++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml
@@ -28,6 +28,7 @@ properties:
- allwinner,sun8i-a33-ccu
- allwinner,sun8i-a83t-ccu
- allwinner,sun8i-a83t-r-ccu
+ - allwinner,sun8i-b288-ccu
- allwinner,sun8i-h3-ccu
- allwinner,sun8i-h3-r-ccu
- allwinner,sun8i-r40-ccu
diff --git a/include/dt-bindings/clock/sun8i-b288-ccu.h b/include/dt-bindings/clock/sun8i-b288-ccu.h
new file mode 100644
index 000000000000..48e532e44a12
--- /dev/null
+++ b/include/dt-bindings/clock/sun8i-b288-ccu.h
@@ -0,0 +1,82 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+#ifndef _DT_BINDINGS_CLK_SUN8I_B288_H_
+#define _DT_BINDINGS_CLK_SUN8I_B288_H_
+
+#define CLK_PLL_CPUX 0
+#define CLK_PLL_AUDIO_BASE 1
+#define CLK_PLL_VIDEO0 2
+#define CLK_PLL_DDR0 3
+#define CLK_PLL_PERIPH0 4
+#define CLK_PLL_VIDEO1 5
+#define CLK_PLL_24M 6
+#define CLK_PLL_PERIPH1 7
+#define CLK_PLL_DE 8
+#define CLK_PLL_DDR1 9
+
+#define CLK_PLL_PERIPH0_2X 10
+#define CLK_PLL_PERIPH1_2X 11
+#define CLK_CPUX 12
+#define CLK_AXI 13
+#define CLK_CPUAPB 14
+#define CLK_AHB1 15
+#define CLK_APB1 16
+#define CLK_APB2 17
+
+#define CLK_NAND 18
+#define CLK_MMC0 19
+#define CLK_MMC1 20
+#define CLK_MMC2 21
+#define CLK_MMC3 22
+#define CLK_SPI0 23
+#define CLK_SPI1 24
+#define CLK_SPI2 25
+#define CLK_DRAM 26
+#define CLK_DE 27
+#define CLK_EE 28
+#define CLK_EDMA 29
+#define CLK_TCON0 30
+#define CLK_MBUS 31
+
+#define CLK_BUS_THS 32
+#define CLK_BUS_NAND 33
+#define CLK_BUS_MMC0 34
+#define CLK_BUS_MMC1 35
+#define CLK_BUS_MMC2 36
+#define CLK_BUS_MMC3 37
+#define CLK_BUS_SPI0 38
+#define CLK_BUS_SPI1 39
+#define CLK_BUS_SPI2 40
+#define CLK_BUS_I2S0 41
+#define CLK_BUS_I2S1 42
+#define CLK_BUS_SPDIF 43
+#define CLK_BUS_DSD 44
+#define CLK_BUS_DMIC 45
+#define CLK_BUS_OHCI0 46
+#define CLK_BUS_EHCI0 47
+#define CLK_BUS_OTG 48
+#define CLK_BUS_DE 49
+#define CLK_BUS_EE 50
+#define CLK_BUS_TCON0 51
+#define CLK_BUS_CSI 52
+#define CLK_BUS_CODEC 53
+#define CLK_BUS_DRAM 54
+#define CLK_BUS_PSRAM 55
+#define CLK_BUS_DMA 56
+#define CLK_BUS_UART0 57
+#define CLK_BUS_UART1 58
+#define CLK_BUS_UART2 59
+#define CLK_BUS_UART3 60
+#define CLK_BUS_UART4 61
+#define CLK_BUS_UART5 62
+#define CLK_BUS_I2C0 63
+#define CLK_BUS_I2C1 64
+#define CLK_BUS_I2C2 65
+#define CLK_BUS_PIO 66
+#define CLK_BUS_GPADC 67
+#define CLK_BUS_KEYADC 68
+#define CLK_MMC0_SAMPLE 69
+#define CLK_MMC0_OUTPUT 70
+#define CLK_MMC1_SAMPLE 71
+#define CLK_MMC1_OUTPUT 72
+
+#endif
diff --git a/include/dt-bindings/reset/sun8i-b288-ccu.h b/include/dt-bindings/reset/sun8i-b288-ccu.h
new file mode 100644
index 000000000000..8595e26ee0fa
--- /dev/null
+++ b/include/dt-bindings/reset/sun8i-b288-ccu.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+#ifndef _DT_BINDINGS_RST_SUN8I_B288_H_
+#define _DT_BINDINGS_RST_SUN8I_B288_H_
+
+#define RST_BUS_THS 0
+#define RST_BUS_NAND 1
+#define RST_BUS_MMC0 2
+#define RST_BUS_MMC1 3
+#define RST_BUS_MMC2 4
+#define RST_BUS_MMC3 5
+#define RST_BUS_SPI0 6
+#define RST_BUS_SPI1 7
+#define RST_BUS_SPI2 8
+#define RST_BUS_I2S0 9
+#define RST_BUS_I2S1 10
+#define RST_BUS_SPDIF 11
+#define RST_BUS_DSD 12
+#define RST_BUS_DMIC 13
+#define RST_USB_PHY0 14
+#define RST_BUS_OHCI0 15
+#define RST_BUS_EHCI0 16
+#define RST_BUS_OTG 17
+#define RST_BUS_DE 18
+#define RST_BUS_EE 19
+#define RST_BUS_TCON0 20
+#define RST_BUS_CSI 21
+#define RST_BUS_CODEC 22
+#define RST_BUS_WLAN 23
+#define RST_MBUS 24
+#define RST_BUS_DRAM 25
+#define RST_BUS_PSRAM 26
+#define RST_BUS_DMA 27
+#define RST_BUS_UART0 28
+#define RST_BUS_UART1 29
+#define RST_BUS_UART2 30
+#define RST_BUS_UART3 31
+#define RST_BUS_UART4 32
+#define RST_BUS_UART5 33
+#define RST_BUS_I2C0 34
+#define RST_BUS_I2C1 35
+#define RST_BUS_I2C2 36
+#define RST_BUS_GPADC 37
+#define RST_BUS_KEYADC 38
+
+#endif
--
2.52.0
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