Re: [PATCH v4 7/7] arm64: dts: qcom: mahua: Switch pcie5_phy ref clock to RPMH_CXO_CLK

[Krzysztof Kozlowski <krzk@kernel.org>]

On 09/06/2026 15:06, Konrad Dybcio wrote:
> On 5/28/26 4:29 AM, Qiang Yu wrote:
>> PCIe5 PHY on Mahua gets refclk from CXO0 pad directly, so no QREF
>> clkref_en voting is required. Override the clock list to use RPMH_CXO_CLK
>> directly instead.
> 
> This is the last piece of the puzzle that this series is missing.
> There's no QREF clkref_en, but there is a refgen that needs to be
> powered. For PCIe5 on Mahua this would be L2F_E0 (0p9) and L4H_E0
> (1p2).
> 
> I think the easiest (laziest?) solution would be to add dummy clocks
> in the clkref driver and only toggle the required regulators. Another
> option is to defer back to individual drivers (such as PCIe QMPPHY).
> 
> I kinda like the "one central node to drive power" approach, but I'm
> not sure others agree, since it stretches truth just a tiny bit
> (although not as much as one would think since there are *some*
> controls for the transparent-to-the-OS hw pieces in these paths still
> in TCSR).. Dmitry, Krzysztof, would you object to that?

Not sure what you ask here... the tcsr will get the refgen supplies and
that's all what is needed from DT.

Best regards,
Krzysztof