Re: [PATCH RFC v4 6/7] drm/msm/adreno: add Adreno 810 GPU support

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 4/23/26 10:34 PM, Alexander Koskovich wrote:
> On Wednesday, April 22nd, 2026 at 9:04 AM, Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> wrote:
> 
>> On 4/16/26 1:05 PM, Alexander Koskovich wrote:
>>> Add catalog entry and register configuration for the Adreno 810
>>> found in Qualcomm SM7635 (Milos) based devices.
>>>
>>> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
>>> ---

[...]

>>> +static const u32 a810_ifpc_reglist_regs[] = {
>>> +	REG_A8XX_RBBM_NC_MODE_CNTL,
>>> +	REG_A8XX_RBBM_PERFCTR_CNTL,
>>
>> This list matches the expectations, modulo this RBBM_PERFCTR_CNTL
> 
> Note on this, added this shortly before submitting this series as requested by Akhil:
> https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40613#note_3395308

Yes, I forgot about that bit. So it's OK.

[...]

>>> +		.speedbins = ADRENO_SPEEDBINS(
>>> +			{ 0,   0 },
>>> +			{ 242, 1 },
>>> +			{ 221, 2 },
>>> +		),
>>
>> The DTs I have all point to SMEM-based SKU checks. Did you find these
>> numbers empirically?
> 
> Yes, and I used speedbin instead as upstream doesn't support the SKU checks
> downstream does. Utilizing GPU_CC_FREQ_LIMIT_VAL to serve as speedbin
> on this platform.

Hm, I'm not sure whether it's a stable identifier on this platform, or
whether it just worked by change. Akhil?

Konrad