public inbox for devicetree@vger.kernel.org
 help / color / mirror / Atom feed
From: <Ryan.Wanner@microchip.com>
To: <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
	<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
	<claudiu.beznea@tuxon.dev>, <lee@kernel.org>, <sre@kernel.org>,
	<p.zabel@pengutronix.de>
Cc: <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-pm@vger.kernel.org>,
	<linux-rtc@vger.kernel.org>,
	Ryan Wanner <Ryan.Wanner@microchip.com>
Subject: [PATCH v5 09/11] ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support
Date: Mon, 14 Apr 2025 14:41:26 -0700	[thread overview]
Message-ID: <354ecd628fdd292d2125570a6b10a93cbecb7706.1744666011.git.Ryan.Wanner@microchip.com> (raw)
In-Reply-To: <cover.1744666011.git.Ryan.Wanner@microchip.com>

From: Ryan Wanner <Ryan.Wanner@microchip.com>

Add SRAM, secumod, UDDRC, and DDR3phy to enable support for low power modes.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
 arch/arm/boot/dts/microchip/sama7d65.dtsi | 35 +++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index b6710ccd4c36..8439c6a9e9f2 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -47,6 +47,14 @@ slow_xtal: clock-slowxtal {
 		};
 	};
 
+	ns_sram: sram@100000 {
+		compatible = "mmio-sram";
+		reg = <0x100000 0x20000>;
+		ranges;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		ranges;
@@ -58,6 +66,23 @@ sfrbu: sfr@e0008000 {
 			reg = <0xe0008000 0x20>;
 		};
 
+		securam: sram@e0000800 {
+			compatible = "microchip,sama7d65-securam", "atmel,sama5d2-securam", "mmio-sram";
+			reg = <0xe0000800 0x4000>;
+			ranges = <0 0xe0000800 0x4000>;
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			no-memory-wc;
+		};
+
+		secumod: security-module@e0004000 {
+			compatible = "microchip,sama7d65-secumod", "atmel,sama5d2-secumod", "syscon";
+			reg = <0xe0004000 0x4000>;
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
 		pioa: pinctrl@e0014000 {
 			compatible = "microchip,sama7d65-pinctrl", "microchip,sama7g5-pinctrl";
 			reg = <0xe0014000 0x800>;
@@ -227,6 +252,16 @@ i2c10: i2c@600 {
 			};
 		};
 
+		uddrc: uddrc@e3800000 {
+			compatible = "microchip,sama7d65-uddrc", "microchip,sama7g5-uddrc";
+			reg = <0xe3800000 0x4000>;
+		};
+
+		ddr3phy: ddr3phy@e3804000 {
+			compatible = "microchip,sama7d65-ddr3phy", "microchip,sama7g5-ddr3phy";
+			reg = <0xe3804000 0x1000>;
+		};
+
 		gic: interrupt-controller@e8c11000 {
 			compatible = "arm,cortex-a7-gic";
 			reg = <0xe8c11000 0x1000>,
-- 
2.43.0


  parent reply	other threads:[~2025-04-14 21:42 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-14 21:41 [PATCH v5 00/11] Enable Power Modes Support for SAMA7D65 SoC Ryan.Wanner
2025-04-14 21:41 ` [PATCH v5 01/11] dt-bindings: sram: Add microchip,sama7d65-sram Ryan.Wanner
2025-04-14 21:41 ` [PATCH v5 02/11] dt-bindings: power: reset: atmel,sama5d2-shdwc: Add microchip,sama7d65-shdwc Ryan.Wanner
2025-04-15  7:59   ` Krzysztof Kozlowski
2025-04-14 21:41 ` [PATCH v5 03/11] dt-bindings: reset: atmel,at91sam9260-reset: add microchip,sama7d65-rstc Ryan.Wanner
2025-04-14 21:41 ` [PATCH v5 04/11] dt-bindings: rtc: at91rm9200: add microchip,sama7d65-rtc Ryan.Wanner
2025-04-14 21:41 ` [PATCH v5 05/11] dt-bindings: at91rm9260-rtt: add microchip,sama7d65-rtt Ryan.Wanner
2025-04-14 21:41 ` [PATCH v5 06/11] dt-bindings: mfd: atmel: Add microchip,sama7d65-gpbr Ryan.Wanner
2025-04-14 21:41 ` [PATCH v5 07/11] dt-bindings: mfd: syscon: atmel,sama5d2-secumod: convert to yaml Ryan.Wanner
2025-04-14 21:41 ` [PATCH v5 08/11] dt-bindings: mfd: syscon: add microchip,sama7d65-secumod Ryan.Wanner
2025-04-14 21:41 ` Ryan.Wanner [this message]
2025-04-26 13:17   ` [PATCH v5 09/11] ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support Claudiu Beznea
2025-04-14 21:41 ` [PATCH v5 10/11] ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoC Ryan.Wanner
2025-04-26 13:16   ` Claudiu Beznea
2025-04-14 21:41 ` [PATCH v5 11/11] ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board Ryan.Wanner
2025-04-15 17:11 ` [PATCH v5 00/11] Enable Power Modes Support for SAMA7D65 SoC Rob Herring (Arm)
2025-04-15 17:23 ` (subset) " Lee Jones
2025-04-27 13:41 ` Claudiu Beznea
2025-04-27 23:27 ` (subset) " Sebastian Reichel
2025-05-24 22:31 ` Alexandre Belloni

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=354ecd628fdd292d2125570a6b10a93cbecb7706.1744666011.git.Ryan.Wanner@microchip.com \
    --to=ryan.wanner@microchip.com \
    --cc=alexandre.belloni@bootlin.com \
    --cc=claudiu.beznea@tuxon.dev \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=lee@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=linux-rtc@vger.kernel.org \
    --cc=nicolas.ferre@microchip.com \
    --cc=p.zabel@pengutronix.de \
    --cc=robh@kernel.org \
    --cc=sre@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox