From: Dinh Nguyen <dinguyen@kernel.org>
To: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] firmware: stratix10-svc: add support for agilex5
Date: Mon, 20 Jul 2026 18:59:55 -0500 [thread overview]
Message-ID: <35520e5f-eccd-4516-875f-2a042107b237@kernel.org> (raw)
In-Reply-To: <c096c728b7becf027b6e9fcc4aa1cc5dfe3cef3a.1782135785.git.adrian.ho.yin.ng@altera.com>
On 6/22/26 08:44, Adrian Ng Ho Yin wrote:
> On Agilex5 the DDR base address starts at 0x8000_0000, which is
> outside the addressable range of the SDM. The SMMU is used to remap
> DDR-allocated buffers to an IOVA within the SDM-accessible 0-512MB
> window. Return -ENODEV at probe if no IOMMU domain is found for an
> intel,agilex5-svc device.
>
> Configure a 29-bit DMA mask to constrain IOVA allocations to the
> 0-512MB range accessible to the SDM. Agilex5 REV B introduced a
> hardware SDM address remapper; bypass it via SMC so no additional
> offset is applied to the IOVA, keeping the implementation
> consistent across all Agilex5 revisions.
>
> ATF validates FPGA_CONFIG_WRITE addresses against the DDR range
> starting at 0x8000_0000. Since IOVAs are below 0x2000_0000, the
> driver adds 0x8000_0000 to the IOVA before the SMC call so ATF's
> is_address_in_ddr_range() check passes. ATF then strips the offset
> and uses the SMMU to translate the remaining IOVA to the underlying
> physical memory for SDM access.
>
> The firmware COMPLETED_WRITE response returns the raw IOVA without
> the 0x8000_0000 offset. Compensate by storing dma_addr_offset in
> the controller and adding it back before the svc_pa_to_va() lookup.
> dma_addr_offset is zero on non-SMMU paths so existing platforms are
> unaffected.
>
> Fix a pre-existing bug in stratix10_svc_free_memory() where an
> unknown-address fallthrough called list_del(&svc_data_mem),
> corrupting the list head. Replace it with dev_warn().
>
> Register a devm cleanup action at probe to reclaim any DMA
> coherent buffers that service clients fail to free before driver
> unbind, preventing memory leaks across probe/remove cycles.
>
> Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
There's alot going on with this patch! Can you split it up into smaller
bits? And what part of this patch needed for the DTS patch?
Dinh
next prev parent reply other threads:[~2026-07-21 0:00 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-22 13:44 [PATCH 0/2] Add FPGA configuration and partial reconfiguration support for Agilex5 Adrian Ng Ho Yin
2026-06-22 13:44 ` [PATCH 1/2] arm64: dts: socfpga: agilex5: add FPGA manager and region nodes Adrian Ng Ho Yin
2026-06-22 13:44 ` [PATCH 2/2] firmware: stratix10-svc: add support for agilex5 Adrian Ng Ho Yin
2026-07-20 23:59 ` Dinh Nguyen [this message]
2026-07-23 2:43 ` Ng, Adrian Ho Yin
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