Re: [PATCH 1/4] dt-bindings: clock: qcom: document the Fillmore Global Clock Controller

[Aelin Reidel <aelin@mainlining.org>]

On 3/9/26 8:38 AM, Krzysztof Kozlowski wrote:
> On Sun, Mar 08, 2026 at 01:39:27AM +0100, Aelin Reidel wrote:
>> Add bindings documentation for the Fillmore (e.g. SM7450) Global Clock
>> Controller.
>>
>> Signed-off-by: Aelin Reidel <aelin@mainlining.org>
>> ---
>>  .../bindings/clock/qcom,fillmore-gcc.yaml          |  60 +++++++
>>  include/dt-bindings/clock/qcom,fillmore-gcc.h      | 195 +++++++++++++++++++++
>>  2 files changed, 255 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,fillmore-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,fillmore-gcc.yaml
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..0eb12a52968edc7961681f0e965b4d6da0858b9c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/qcom,fillmore-gcc.yaml
>> @@ -0,0 +1,60 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/qcom,fillmore-gcc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Global Clock & Reset Controller on Fillmore
>> +
>> +maintainers:
>> +  - Aelin Reidel <aelin@mainlining.org>
>> +
>> +description: |
>> +  Qualcomm global clock control module provides the clocks, resets and power
>> +  domains on Fillmore.
>> +
>> +  See also: include/dt-bindings/clock/qcom,fillmore-gcc.h
>> +
>> +properties:
>> +  compatible:
>> +    const: qcom,fillmore-gcc
>> +
>> +  clocks:
>> +    items:
>> +      - description: Board XO source
>> +      - description: Sleep clock source
>> +      - description: PCIE 0 Pipe clock source
> 
> Aer you sure there is no PCIE 1? Because I would be dissapointed if it
> is being added later. With PCIE 1 clock this would be basically Milos
> GCC.
> 
> Best regards,
> Krzysztof

Yes, there is no PCIE 1. Fillmore has only PCIE 0, which is used for WiFi/BT
and is Gen 3 1-lane.

Best regards,
Aelin