From: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
To: Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: Linus Walleij
<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
"linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org"
<linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org>
Subject: Re: [PATCH 5/8] arm64: dts: allwinner: add R_PIO node
Date: Wed, 08 Feb 2017 19:08:46 +0800 [thread overview]
Message-ID: <39431486552126@web41j.yandex.ru> (raw)
In-Reply-To: <20170208101458.du6ybqsw52ypzhzw@lukather>
08.02.2017, 18:15, "Maxime Ripard" <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>:
> On Wed, Feb 08, 2017 at 06:00:06PM +0800, Icenowy Zheng wrote:
>> Allwinner A64 SoC has a R_PIO node like the one in H3.
>>
>> Add the node as well as needed clocks and resets.
>>
>> As there's no document for apb0_gates, I only added the R_PIO bit here.
>>
>> Signed-off-by: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
>> ---
>> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 40 +++++++++++++++++++++++++++
>> 1 file changed, 40 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> index 1c64ea2d23f9..4b0baa79554c 100644
>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
>> @@ -98,6 +98,15 @@
>> clock-output-names = "osc32k";
>> };
>>
>> + apb0: apb0_clk {
>> + compatible = "fixed-factor-clock";
>> + #clock-cells = <0>;
>> + clock-div = <1>;
>> + clock-mult = <1>;
>> + clocks = <&osc24M>;
>> + clock-output-names = "apb0";
>> + };
>> +
>> psci {
>> compatible = "arm,psci-0.2";
>> method = "smc";
>> @@ -392,5 +401,36 @@
>> interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>> };
>> +
>> + apb0_gates: clk@1f01428 {
>> + compatible = "allwinner,sun50i-a64-apb0-gates-clk",
>> + "allwinner,sun4i-a10-gates-clk";
>> + reg = <0x01f01428 0x4>;
>> + #clock-cells = <1>;
>> + clocks = <&apb0>;
>> + clock-indices = <0>;
>> + clock-output-names = "apb0_pio";
>> + };
>> +
>> + apb0_rst: reset@1f014b0 {
>> + reg = <0x01f014b0 0x4>;
>> + compatible = "allwinner,sun6i-a31-clock-reset";
>> + #reset-cells = <1>;
>> + };
>
> Please make a sunxi-ng driver for those clocks.
We have no enough materials to make such a CCU driver.
Clocks in CPUs are usually undocumented, and difficult to
be collected -- even the clk-sun50iw1.c in BSP do not have
all clocks in CPUs.
We should only make it sunxi-ng until it's fully discovered
(all functions in CPUs are functional).
>
> Thanks,
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
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next prev parent reply other threads:[~2017-02-08 11:08 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-08 10:00 [PATCH 1/8] dt-bindings: fix for Allwinner H5 pinctrl's compatible Icenowy Zheng
[not found] ` <20170208100009.29362-1-icenowy-ymACFijhrKM@public.gmane.org>
2017-02-08 10:00 ` [PATCH 2/8] dt: bindings: add binding for Allwinner A64 R_PIO pinctrl Icenowy Zheng
[not found] ` <20170208100009.29362-2-icenowy-ymACFijhrKM@public.gmane.org>
2017-02-13 15:06 ` Chen-Yu Tsai
2017-02-08 10:00 ` [PATCH 3/8] pinctrl: sunxi: Add A64 R_PIO controller support Icenowy Zheng
[not found] ` <20170208100009.29362-3-icenowy-ymACFijhrKM@public.gmane.org>
2017-02-13 14:52 ` Linus Walleij
2017-02-13 15:09 ` Chen-Yu Tsai
2017-02-08 10:00 ` [PATCH 4/8] arm64: allwinner: select A64 R_PIO driver Icenowy Zheng
2017-02-08 10:00 ` [PATCH 5/8] arm64: dts: allwinner: add R_PIO node Icenowy Zheng
[not found] ` <20170208100009.29362-5-icenowy-ymACFijhrKM@public.gmane.org>
2017-02-08 10:14 ` Maxime Ripard
2017-02-08 11:08 ` Icenowy Zheng [this message]
[not found] ` <39431486552126-4vD9JDEoAAxxpj1cXAZ9Bg@public.gmane.org>
2017-02-10 8:07 ` Maxime Ripard
2017-02-08 10:00 ` [PATCH 6/8] arm64: dts: allwinner: add device node for R_PWM Icenowy Zheng
[not found] ` <20170208100009.29362-6-icenowy-ymACFijhrKM@public.gmane.org>
2017-02-08 10:17 ` Maxime Ripard
2017-02-08 10:00 ` [PATCH 7/8] arm64: dts: allwinner: add pinmux for A64's r_pwm Icenowy Zheng
2017-02-08 10:00 ` [PATCH 8/8] arm64: dts: allwinner: add PWM node to A64 dtsi Icenowy Zheng
[not found] ` <20170208100009.29362-8-icenowy-ymACFijhrKM@public.gmane.org>
2017-02-08 10:17 ` Maxime Ripard
2017-02-13 15:04 ` [PATCH 1/8] dt-bindings: fix for Allwinner H5 pinctrl's compatible Chen-Yu Tsai
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