From: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Brian Norris
<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Gregory Fong
<gregory.0xf0-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
open list <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH v2 0/9] soc: brcmstb: biuctrl updates for 64-bit chips
Date: Wed, 20 Dec 2017 17:38:43 -0800 [thread overview]
Message-ID: <409b31a8-03ba-e371-b8a8-7975ef896fc8@gmail.com> (raw)
In-Reply-To: <20171219192247.29799-1-f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Le 12/19/17 à 11:22, Florian Fainelli a écrit :
> Hi all,
>
> This patch series updates the Broadcom STB Bus Interface Unit controller to
> support newer chips such as 7260, 7268, 7271 and 7278. These chips require
> additional tuning in order to provide the expected bus throughput.
>
> In the process, we need to re-organize the common.c file a little bit in order
> to extract the family and product identifiers a little earlier.
>
> Finally, by moving the biuctrl initialization an early_initcall level, we can
> remove some code from the ARM-32bit machine descriptor file.
>
> Provided that we are happy with these changes, I would route them through my
> drivers/next branch and a subsequent Broadcom ARM SoC pull request.
>
> Thank you
>
> Changes in v2:
>
> - collect Rob's acked-by on the first patch
> - fixed the binding as suggested by Rob
>
> Florian Fainelli (9):
> dt-bindings: arm: Add entry for Broadcom Brahma-B53
> dt-bindings: arm: brcmstb: Correct BIUCTRL node documentation
> soc: brcmstb: Make CPU credit offset more parameterized
> soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs
> soc: brcmstb: biuctrl: Prepare for saving/restoring other registers
> soc: brcmstb: biuctrl: Wire-up new registers
> soc: brcmstb: biuctrl: Fine tune B53 MCP interface settings
> soc: brcmstb: Split initialization
> soc: brcmstb: biuctrl: Move to early_initcall
Series applied to drivers/next.
--
Florian
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prev parent reply other threads:[~2017-12-21 1:38 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-19 19:22 [PATCH v2 0/9] soc: brcmstb: biuctrl updates for 64-bit chips Florian Fainelli
2017-12-19 19:22 ` [PATCH v2 1/9] dt-bindings: arm: Add entry for Broadcom Brahma-B53 Florian Fainelli
2017-12-19 19:22 ` [PATCH v2 2/9] dt-bindings: arm: brcmstb: Correct BIUCTRL node documentation Florian Fainelli
[not found] ` <20171219192247.29799-3-f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-12-20 21:24 ` Rob Herring
2017-12-19 19:22 ` [PATCH v2 3/9] soc: brcmstb: Make CPU credit offset more parameterized Florian Fainelli
2017-12-19 19:22 ` [PATCH v2 4/9] soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs Florian Fainelli
2017-12-19 19:22 ` [PATCH v2 5/9] soc: brcmstb: biuctrl: Prepare for saving/restoring other registers Florian Fainelli
2017-12-19 19:22 ` [PATCH v2 6/9] soc: brcmstb: biuctrl: Wire-up new registers Florian Fainelli
2017-12-19 19:22 ` [PATCH v2 7/9] soc: brcmstb: biuctrl: Fine tune B53 MCP interface settings Florian Fainelli
2017-12-19 19:22 ` [PATCH v2 8/9] soc: brcmstb: Split initialization Florian Fainelli
2017-12-19 19:22 ` [PATCH v2 9/9] soc: brcmstb: biuctrl: Move to early_initcall Florian Fainelli
[not found] ` <20171219192247.29799-1-f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-12-21 1:38 ` Florian Fainelli [this message]
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