* [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB
2026-03-04 11:34 [PATCH v8 0/9] Add support for i.MX94 DCIF Laurentiu Palcu
@ 2026-03-04 11:34 ` Laurentiu Palcu
2026-03-06 7:44 ` Liu Ying
2026-03-04 11:34 ` [PATCH v8 4/9] dt-bindings: display: imx: Add i.MX94 DCIF Laurentiu Palcu
` (3 subsequent siblings)
4 siblings, 1 reply; 21+ messages in thread
From: Laurentiu Palcu @ 2026-03-04 11:34 UTC (permalink / raw)
To: imx, Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Marek Vasut
Cc: dri-devel, Frank Li, Ying Liu, Laurentiu Palcu, devicetree,
linux-kernel
i.MX94 has a single LVDS port and share similar LDB and LVDS control
registers as i.MX8MP and i.MX93.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
index 7f380879fffdf..fb70409161fc0 100644
--- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
@@ -20,6 +20,7 @@ properties:
- fsl,imx6sx-ldb
- fsl,imx8mp-ldb
- fsl,imx93-ldb
+ - fsl,imx94-ldb
clocks:
maxItems: 1
@@ -78,6 +79,7 @@ allOf:
enum:
- fsl,imx6sx-ldb
- fsl,imx93-ldb
+ - fsl,imx94-ldb
then:
properties:
ports:
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB
2026-03-04 11:34 ` [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB Laurentiu Palcu
@ 2026-03-06 7:44 ` Liu Ying
2026-03-06 8:46 ` Marco Felsch
0 siblings, 1 reply; 21+ messages in thread
From: Liu Ying @ 2026-03-06 7:44 UTC (permalink / raw)
To: Laurentiu Palcu, imx, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, David Airlie,
Simona Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Marek Vasut
Cc: dri-devel, Frank Li, devicetree, linux-kernel, Marco Felsch
On Wed, Mar 04, 2026 at 11:34:10AM +0000, Laurentiu Palcu wrote:
> i.MX94 has a single LVDS port and share similar LDB and LVDS control
> registers as i.MX8MP and i.MX93.
>
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> index 7f380879fffdf..fb70409161fc0 100644
> --- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> @@ -20,6 +20,7 @@ properties:
> - fsl,imx6sx-ldb
> - fsl,imx8mp-ldb
> - fsl,imx93-ldb
> + - fsl,imx94-ldb
Cc'ing Marco.
Recently, Marco said that LDB node should not have a reg property...
https://lore.kernel.org/all/4sofljffovrorpxe2os3jl745qfjoglvl54oqf3v7r5bk5f6aq@6y3jwn4abiqy/
>
> clocks:
> maxItems: 1
> @@ -78,6 +79,7 @@ allOf:
> enum:
> - fsl,imx6sx-ldb
> - fsl,imx93-ldb
> + - fsl,imx94-ldb
> then:
> properties:
> ports:
>
--
Regards,
Liu Ying
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB
2026-03-06 7:44 ` Liu Ying
@ 2026-03-06 8:46 ` Marco Felsch
2026-03-19 8:57 ` Laurentiu Palcu
0 siblings, 1 reply; 21+ messages in thread
From: Marco Felsch @ 2026-03-06 8:46 UTC (permalink / raw)
To: Liu Ying
Cc: Laurentiu Palcu, imx, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, David Airlie,
Simona Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Marek Vasut, dri-devel, Frank Li, devicetree, linux-kernel
On 26-03-06, Liu Ying wrote:
> On Wed, Mar 04, 2026 at 11:34:10AM +0000, Laurentiu Palcu wrote:
> > i.MX94 has a single LVDS port and share similar LDB and LVDS control
> > registers as i.MX8MP and i.MX93.
> >
> > Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> > Reviewed-by: Frank Li <Frank.Li@nxp.com>
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > ---
> > Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> > index 7f380879fffdf..fb70409161fc0 100644
> > --- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> > +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> > @@ -20,6 +20,7 @@ properties:
> > - fsl,imx6sx-ldb
> > - fsl,imx8mp-ldb
> > - fsl,imx93-ldb
> > + - fsl,imx94-ldb
>
> Cc'ing Marco.
>
> Recently, Marco said that LDB node should not have a reg property...
>
> https://lore.kernel.org/all/4sofljffovrorpxe2os3jl745qfjoglvl54oqf3v7r5bk5f6aq@6y3jwn4abiqy/
Yes, this has to be dropped. All variants of this specific "IP" use the
same approach. This "IP" is part of a general purpose register layout
with very loose reg-field definitions: e.g. resets and clk-gatting share
the same register. Or a mux reg-field shares the same register as a
MIPI-{C,D}SI configuration reg-field. Therefore this "IP" is part of a
syscon and should be abstracted as such within the DT.
Regards,
Marco
> > clocks:
> > maxItems: 1
> > @@ -78,6 +79,7 @@ allOf:
> > enum:
> > - fsl,imx6sx-ldb
> > - fsl,imx93-ldb
> > + - fsl,imx94-ldb
> > then:
> > properties:
> > ports:
> >
>
> --
> Regards,
> Liu Ying
--
#gernperDu
#CallMeByMyFirstName
Pengutronix e.K. | |
Steuerwalder Str. 21 | https://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB
2026-03-06 8:46 ` Marco Felsch
@ 2026-03-19 8:57 ` Laurentiu Palcu
2026-03-19 14:38 ` Marek Vasut
0 siblings, 1 reply; 21+ messages in thread
From: Laurentiu Palcu @ 2026-03-19 8:57 UTC (permalink / raw)
To: Marco Felsch
Cc: Liu Ying, imx, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, David Airlie,
Simona Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Marek Vasut, dri-devel, Frank Li, devicetree, linux-kernel
On Fri, Mar 06, 2026 at 09:46:57AM +0100, Marco Felsch wrote:
> On 26-03-06, Liu Ying wrote:
> > On Wed, Mar 04, 2026 at 11:34:10AM +0000, Laurentiu Palcu wrote:
> > > i.MX94 has a single LVDS port and share similar LDB and LVDS control
> > > registers as i.MX8MP and i.MX93.
> > >
> > > Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> > > Reviewed-by: Frank Li <Frank.Li@nxp.com>
> > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > > ---
> > > Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml | 2 ++
> > > 1 file changed, 2 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> > > index 7f380879fffdf..fb70409161fc0 100644
> > > --- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> > > +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> > > @@ -20,6 +20,7 @@ properties:
> > > - fsl,imx6sx-ldb
> > > - fsl,imx8mp-ldb
> > > - fsl,imx93-ldb
> > > + - fsl,imx94-ldb
> >
> > Cc'ing Marco.
> >
> > Recently, Marco said that LDB node should not have a reg property...
> >
> > https://lore.kernel.org/all/4sofljffovrorpxe2os3jl745qfjoglvl54oqf3v7r5bk5f6aq@6y3jwn4abiqy/
>
> Yes, this has to be dropped. All variants of this specific "IP" use the
> same approach. This "IP" is part of a general purpose register layout
> with very loose reg-field definitions: e.g. resets and clk-gatting share
> the same register. Or a mux reg-field shares the same register as a
> MIPI-{C,D}SI configuration reg-field. Therefore this "IP" is part of a
> syscon and should be abstracted as such within the DT.
Even though I understand the logic behind why 'reg' should be dropped,
I'm not exactly sure how to proceed with this. It appears Marek made the
'reg' required in this commit (merely 2 months ago):
8aa2f0ac08d3b - dt-bindings: display: bridge: ldb: Add check for reg and reg-names
Should the above patch simply be reverted and have 'reg' as optional again?
Or should the 'reg' and 'reg-names' be removed completely from the
binding.
@Marek, any comments?
--
Thanks,
Laurentiu
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB
2026-03-19 8:57 ` Laurentiu Palcu
@ 2026-03-19 14:38 ` Marek Vasut
2026-03-20 8:23 ` Marco Felsch
0 siblings, 1 reply; 21+ messages in thread
From: Marek Vasut @ 2026-03-19 14:38 UTC (permalink / raw)
To: Laurentiu Palcu, Marco Felsch
Cc: Liu Ying, imx, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, David Airlie,
Simona Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Marek Vasut, dri-devel, Frank Li, devicetree, linux-kernel
On 3/19/26 9:57 AM, Laurentiu Palcu wrote:
> On Fri, Mar 06, 2026 at 09:46:57AM +0100, Marco Felsch wrote:
>> On 26-03-06, Liu Ying wrote:
>>> On Wed, Mar 04, 2026 at 11:34:10AM +0000, Laurentiu Palcu wrote:
>>>> i.MX94 has a single LVDS port and share similar LDB and LVDS control
>>>> registers as i.MX8MP and i.MX93.
>>>>
>>>> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
>>>> Reviewed-by: Frank Li <Frank.Li@nxp.com>
>>>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>>> ---
>>>> Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml | 2 ++
>>>> 1 file changed, 2 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
>>>> index 7f380879fffdf..fb70409161fc0 100644
>>>> --- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
>>>> +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
>>>> @@ -20,6 +20,7 @@ properties:
>>>> - fsl,imx6sx-ldb
>>>> - fsl,imx8mp-ldb
>>>> - fsl,imx93-ldb
>>>> + - fsl,imx94-ldb
>>>
>>> Cc'ing Marco.
>>>
>>> Recently, Marco said that LDB node should not have a reg property...
>>>
>>> https://lore.kernel.org/all/4sofljffovrorpxe2os3jl745qfjoglvl54oqf3v7r5bk5f6aq@6y3jwn4abiqy/
>>
>> Yes, this has to be dropped. All variants of this specific "IP" use the
>> same approach. This "IP" is part of a general purpose register layout
>> with very loose reg-field definitions: e.g. resets and clk-gatting share
>> the same register. Or a mux reg-field shares the same register as a
>> MIPI-{C,D}SI configuration reg-field. Therefore this "IP" is part of a
>> syscon and should be abstracted as such within the DT.
>
> Even though I understand the logic behind why 'reg' should be dropped,
> I'm not exactly sure how to proceed with this. It appears Marek made the
> 'reg' required in this commit (merely 2 months ago):
>
> 8aa2f0ac08d3b - dt-bindings: display: bridge: ldb: Add check for reg and reg-names
>
> Should the above patch simply be reverted and have 'reg' as optional again?
> Or should the 'reg' and 'reg-names' be removed completely from the
> binding.
>
> @Marek, any comments?
The LDB driver was always written with parsing 'reg' out of the DT, so
encoding the register offsets into the driver was a mistake. The LDB
controls two registers, which can be comfortably described in DT.
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB
2026-03-19 14:38 ` Marek Vasut
@ 2026-03-20 8:23 ` Marco Felsch
2026-03-21 2:37 ` Marek Vasut
0 siblings, 1 reply; 21+ messages in thread
From: Marco Felsch @ 2026-03-20 8:23 UTC (permalink / raw)
To: Marek Vasut
Cc: Laurentiu Palcu, Liu Ying, imx, Andrzej Hajda, Neil Armstrong,
Robert Foss, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Marek Vasut, dri-devel, Frank Li, devicetree, linux-kernel
Hi Marek,
On 26-03-19, Marek Vasut wrote:
> On 3/19/26 9:57 AM, Laurentiu Palcu wrote:
> > On Fri, Mar 06, 2026 at 09:46:57AM +0100, Marco Felsch wrote:
> > > On 26-03-06, Liu Ying wrote:
> > > > On Wed, Mar 04, 2026 at 11:34:10AM +0000, Laurentiu Palcu wrote:
> > > > > i.MX94 has a single LVDS port and share similar LDB and LVDS control
> > > > > registers as i.MX8MP and i.MX93.
> > > > >
> > > > > Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> > > > > Reviewed-by: Frank Li <Frank.Li@nxp.com>
> > > > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > > > > ---
> > > > > Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml | 2 ++
> > > > > 1 file changed, 2 insertions(+)
> > > > >
> > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> > > > > index 7f380879fffdf..fb70409161fc0 100644
> > > > > --- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> > > > > +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> > > > > @@ -20,6 +20,7 @@ properties:
> > > > > - fsl,imx6sx-ldb
> > > > > - fsl,imx8mp-ldb
> > > > > - fsl,imx93-ldb
> > > > > + - fsl,imx94-ldb
> > > >
> > > > Cc'ing Marco.
> > > >
> > > > Recently, Marco said that LDB node should not have a reg property...
> > > >
> > > > https://lore.kernel.org/all/4sofljffovrorpxe2os3jl745qfjoglvl54oqf3v7r5bk5f6aq@6y3jwn4abiqy/
> > >
> > > Yes, this has to be dropped. All variants of this specific "IP" use the
> > > same approach. This "IP" is part of a general purpose register layout
> > > with very loose reg-field definitions: e.g. resets and clk-gatting share
> > > the same register. Or a mux reg-field shares the same register as a
> > > MIPI-{C,D}SI configuration reg-field. Therefore this "IP" is part of a
> > > syscon and should be abstracted as such within the DT.
> >
> > Even though I understand the logic behind why 'reg' should be dropped,
> > I'm not exactly sure how to proceed with this. It appears Marek made the
> > 'reg' required in this commit (merely 2 months ago):
> >
> > 8aa2f0ac08d3b - dt-bindings: display: bridge: ldb: Add check for reg and reg-names
> >
> > Should the above patch simply be reverted and have 'reg' as optional again?
> > Or should the 'reg' and 'reg-names' be removed completely from the
> > binding.
> >
> > @Marek, any comments?
> The LDB driver was always written with parsing 'reg' out of the DT, so
Not sure what you mean by always. I re-checked the imx6qdl.dtsi which
uses the ipuv3/imx-ldb.c driver. These platforms don't use the 'reg'
property either.
> encoding the register offsets into the driver was a mistake. The LDB
> controls two registers, which can be comfortably described in DT.
Sorry but I have to disagree on this. It's no about if it's possible,
it's about if the abstraction is correct and IMHO the LDB is just one
subdevice of the syscon. For i.MX6SX the syscon is the iomuxc-gpr for
the i.MX8M and i.MX9 this is now a blkctrl.
So IMHO the dt-bindings patch should be reverted and the DTs need to be
adapted.
Regards,
Marco
>
--
#gernperDu
#CallMeByMyFirstName
Pengutronix e.K. | |
Steuerwalder Str. 21 | https://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB
2026-03-20 8:23 ` Marco Felsch
@ 2026-03-21 2:37 ` Marek Vasut
2026-03-23 7:22 ` Liu Ying
0 siblings, 1 reply; 21+ messages in thread
From: Marek Vasut @ 2026-03-21 2:37 UTC (permalink / raw)
To: Marco Felsch
Cc: Laurentiu Palcu, Liu Ying, imx, Andrzej Hajda, Neil Armstrong,
Robert Foss, Laurent Pinchart, Jonas Karlman, Jernej Skrabec,
David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Marek Vasut, dri-devel, Frank Li, devicetree, linux-kernel
On 3/20/26 9:23 AM, Marco Felsch wrote:
Hello Marco,
>> The LDB driver was always written with parsing 'reg' out of the DT, so
>
> Not sure what you mean by always.
By always, I mean since the very beginning.
> I re-checked the imx6qdl.dtsi which
> uses the ipuv3/imx-ldb.c driver. These platforms don't use the 'reg'
> property either.
Which is a different driver, although for a similar IP. We are however
currently talking about drivers/gpu/drm/bridge/fsl-ldb.c , right ?
>> encoding the register offsets into the driver was a mistake. The LDB
>> controls two registers, which can be comfortably described in DT.
>
> Sorry but I have to disagree on this. It's no about if it's possible,
> it's about if the abstraction is correct and IMHO the LDB is just one
> subdevice of the syscon. For i.MX6SX the syscon is the iomuxc-gpr for
> the i.MX8M and i.MX9 this is now a blkctrl.
Right, and the "reg" DT property specifies at which offsets are the LDB
control registers from the start of that blkctrl. What is the problem
with that ?
Look at e.g. imx8mp.dtsi as an example with blkctrl and LDB as a subnode
with "reg" DT properties:
1938 media_blk_ctrl: blk-ctrl@32ec0000 {
1939 compatible =
"fsl,imx8mp-media-blk-ctrl",
1940 "syscon";
...
2003 lvds_bridge: bridge@5c {
2004 compatible = "fsl,imx8mp-ldb";
2005 reg = <0x5c 0x4>, <0x128 0x4>;
2006 reg-names = "ldb", "lvds";
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB
2026-03-21 2:37 ` Marek Vasut
@ 2026-03-23 7:22 ` Liu Ying
2026-03-25 8:02 ` Laurentiu Palcu
2026-03-27 23:17 ` Marek Vasut
0 siblings, 2 replies; 21+ messages in thread
From: Liu Ying @ 2026-03-23 7:22 UTC (permalink / raw)
To: Marek Vasut, Marco Felsch
Cc: Laurentiu Palcu, imx, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, David Airlie,
Simona Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Marek Vasut, dri-devel, Frank Li, devicetree, linux-kernel
On Sat, Mar 21, 2026 at 03:37:47AM +0100, Marek Vasut wrote:
> On 3/20/26 9:23 AM, Marco Felsch wrote:
>
> Hello Marco,
>
>>> The LDB driver was always written with parsing 'reg' out of the DT, so
>>
>> Not sure what you mean by always.
>
> By always, I mean since the very beginning.
Marek, your below patch is not accepted(at least for now). In that patch,
register offset(s) are directly parsed by calling of_property_read_reg().
Without that patch, register offset(s) are determined via device data in
driver according to compatible string.
[PATCH v3] drm/bridge: fsl-ldb: Parse register offsets from DT
https://lore.kernel.org/all/20260104213712.128982-1-marek.vasut@mailbox.org/
[...]
>
>>> encoding the register offsets into the driver was a mistake. The LDB
>>> controls two registers, which can be comfortably described in DT.
>>
>> Sorry but I have to disagree on this. It's no about if it's possible,
>> it's about if the abstraction is correct and IMHO the LDB is just one
>> subdevice of the syscon. For i.MX6SX the syscon is the iomuxc-gpr for
>> the i.MX8M and i.MX9 this is now a blkctrl.
>
> Right, and the "reg" DT property specifies at which offsets are the LDB
> control registers from the start of that blkctrl. What is the problem
> with that ?
The problem is that ...
>
> Look at e.g. imx8mp.dtsi as an example with blkctrl and LDB as a subnode
> with "reg" DT properties:
>
> 1938 media_blk_ctrl: blk-ctrl@32ec0000 {
> 1939 compatible = "fsl,imx8mp-media-blk-ctrl",
> 1940 "syscon";
> ...
> 2003 lvds_bridge: bridge@5c {
> 2004 compatible = "fsl,imx8mp-ldb";
> 2005 reg = <0x5c 0x4>, <0x128 0x4>;
> 2006 reg-names = "ldb", "lvds";
... i.MX8MP LVDS bridge node is fine with the reg property, but the property
is not allowed for i.MX93 LVDS bridge node according to commit[1] while
commit[2] requires the property for all LVDS bridge nodes. See the contradict
here?
[1] 3feaa4342637 dt-bindings: soc: imx93-media-blk-ctrl: Add PDFC subnode to schema and example
[2] 8aa2f0ac08d3 dt-bindings: display: bridge: ldb: Add check for reg and reg-names
To avoid the contradict, how about requiring the reg property only for i.MX6SX
and i.MX8MP LVDS bridge nodes and making it kind of optional for i.MX93 and
i.MX94 LVDS bridge nodes? Overall, in terms of the reg property, I feel the
LVDS bridge nodes look similar to reg-mux/mmio-mux(See reg-mux.yaml) where
the property is optional. BTW, there is a mux-controller node with 'mmio-mux'
compatible string in i.MX8mq syscon@30340000:
iomuxc_gpr: syscon@30340000 {
compatible = "fsl,imx8mq-iomuxc-gpr", "syscon", "simple-mfd";
reg = <0x30340000 0x10000>;
mux: mux-controller {
compatible = "mmio-mux";
#mux-control-cells = <1>;
mux-reg-masks = <0x34 0x00000004>; /* MIPI_MUX_SEL */
};
};
We never know if HW designer would put a mux-controller next to a LVDS
bridge under a syscon device like gpr or blk-ctrl in future i.MX SoCs,
so the optional reg property would buy us some flexibility.
The below patch is what I propose together with a Fixes tag for commit[2].
Since commit[2] is not in v6.19 and v7.0-rc5 was just released, it seems
that we have time to land the proposal fix if it makes sense. WDYT?
--- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
@@ -28,6 +28,7 @@ properties:
const: ldb
reg:
+ minItems: 1
maxItems: 2
reg-names:
@@ -68,7 +69,6 @@ required:
- compatible
- clocks
- ports
- - reg
allOf:
- if:
@@ -83,12 +83,23 @@ allOf:
ports:
properties:
port@2: false
+
- if:
- not:
- properties:
- compatible:
- contains:
- const: fsl,imx6sx-ldb
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx6sx-ldb
+ - fsl,imx8mp-ldb
+ then:
+ required:
+ - reg
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8mp-ldb
then:
required:
- reg-names
--
Regards,
Liu Ying
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB
2026-03-23 7:22 ` Liu Ying
@ 2026-03-25 8:02 ` Laurentiu Palcu
2026-03-25 12:51 ` Marek Vasut
2026-03-27 23:17 ` Marek Vasut
1 sibling, 1 reply; 21+ messages in thread
From: Laurentiu Palcu @ 2026-03-25 8:02 UTC (permalink / raw)
To: Liu Ying, Marek Vasut, Marco Felsch
Cc: imx, Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Marek Vasut, dri-devel,
Frank Li, devicetree, linux-kernel
On Mon, Mar 23, 2026 at 03:22:35PM +0800, Liu Ying wrote:
> On Sat, Mar 21, 2026 at 03:37:47AM +0100, Marek Vasut wrote:
> > On 3/20/26 9:23 AM, Marco Felsch wrote:
> >
> > Hello Marco,
> >
> >>> The LDB driver was always written with parsing 'reg' out of the DT, so
> >>
> >> Not sure what you mean by always.
> >
> > By always, I mean since the very beginning.
>
> Marek, your below patch is not accepted(at least for now). In that patch,
> register offset(s) are directly parsed by calling of_property_read_reg().
> Without that patch, register offset(s) are determined via device data in
> driver according to compatible string.
>
> [PATCH v3] drm/bridge: fsl-ldb: Parse register offsets from DT
> https://lore.kernel.org/all/20260104213712.128982-1-marek.vasut@mailbox.org/
>
> [...]
>
> >
> >>> encoding the register offsets into the driver was a mistake. The LDB
> >>> controls two registers, which can be comfortably described in DT.
> >>
> >> Sorry but I have to disagree on this. It's no about if it's possible,
> >> it's about if the abstraction is correct and IMHO the LDB is just one
> >> subdevice of the syscon. For i.MX6SX the syscon is the iomuxc-gpr for
> >> the i.MX8M and i.MX9 this is now a blkctrl.
> >
> > Right, and the "reg" DT property specifies at which offsets are the LDB
> > control registers from the start of that blkctrl. What is the problem
> > with that ?
>
> The problem is that ...
>
> >
> > Look at e.g. imx8mp.dtsi as an example with blkctrl and LDB as a subnode
> > with "reg" DT properties:
> >
> > 1938 media_blk_ctrl: blk-ctrl@32ec0000 {
> > 1939 compatible = "fsl,imx8mp-media-blk-ctrl",
> > 1940 "syscon";
> > ...
> > 2003 lvds_bridge: bridge@5c {
> > 2004 compatible = "fsl,imx8mp-ldb";
> > 2005 reg = <0x5c 0x4>, <0x128 0x4>;
> > 2006 reg-names = "ldb", "lvds";
>
> ... i.MX8MP LVDS bridge node is fine with the reg property, but the property
> is not allowed for i.MX93 LVDS bridge node according to commit[1] while
> commit[2] requires the property for all LVDS bridge nodes. See the contradict
> here?
>
> [1] 3feaa4342637 dt-bindings: soc: imx93-media-blk-ctrl: Add PDFC subnode to schema and example
> [2] 8aa2f0ac08d3 dt-bindings: display: bridge: ldb: Add check for reg and reg-names
>
> To avoid the contradict, how about requiring the reg property only for i.MX6SX
> and i.MX8MP LVDS bridge nodes and making it kind of optional for i.MX93 and
> i.MX94 LVDS bridge nodes? Overall, in terms of the reg property, I feel the
> LVDS bridge nodes look similar to reg-mux/mmio-mux(See reg-mux.yaml) where
> the property is optional. BTW, there is a mux-controller node with 'mmio-mux'
> compatible string in i.MX8mq syscon@30340000:
>
> iomuxc_gpr: syscon@30340000 {
> compatible = "fsl,imx8mq-iomuxc-gpr", "syscon", "simple-mfd";
> reg = <0x30340000 0x10000>;
>
> mux: mux-controller {
> compatible = "mmio-mux";
> #mux-control-cells = <1>;
> mux-reg-masks = <0x34 0x00000004>; /* MIPI_MUX_SEL */
> };
> };
>
> We never know if HW designer would put a mux-controller next to a LVDS
> bridge under a syscon device like gpr or blk-ctrl in future i.MX SoCs,
> so the optional reg property would buy us some flexibility.
>
> The below patch is what I propose together with a Fixes tag for commit[2].
> Since commit[2] is not in v6.19 and v7.0-rc5 was just released, it seems
> that we have time to land the proposal fix if it makes sense. WDYT?
Marek, Marco,
Does Ying's proposed solution sound reasonable? Having the 'reg'
property optional for i.MX93 and i.MX94 platforms seems like a good
compromise. Can we move forward with this?
>
> --- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml
> @@ -28,6 +28,7 @@ properties:
> const: ldb
>
> reg:
> + minItems: 1
> maxItems: 2
>
> reg-names:
> @@ -68,7 +69,6 @@ required:
> - compatible
> - clocks
> - ports
> - - reg
>
> allOf:
> - if:
> @@ -83,12 +83,23 @@ allOf:
> ports:
> properties:
> port@2: false
> +
> - if:
> - not:
> - properties:
> - compatible:
> - contains:
> - const: fsl,imx6sx-ldb
> + properties:
> + compatible:
> + contains:
> + enum:
> + - fsl,imx6sx-ldb
> + - fsl,imx8mp-ldb
> + then:
> + required:
> + - reg
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: fsl,imx8mp-ldb
> then:
> required:
> - reg-names
>
> --
> Regards,
> Liu Ying
--
Thanks,
Laurentiu
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB
2026-03-25 8:02 ` Laurentiu Palcu
@ 2026-03-25 12:51 ` Marek Vasut
0 siblings, 0 replies; 21+ messages in thread
From: Marek Vasut @ 2026-03-25 12:51 UTC (permalink / raw)
To: Laurentiu Palcu, Liu Ying, Marco Felsch
Cc: imx, Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Marek Vasut, dri-devel,
Frank Li, devicetree, linux-kernel
On 3/25/26 9:02 AM, Laurentiu Palcu wrote:
> On Mon, Mar 23, 2026 at 03:22:35PM +0800, Liu Ying wrote:
>> On Sat, Mar 21, 2026 at 03:37:47AM +0100, Marek Vasut wrote:
>>> On 3/20/26 9:23 AM, Marco Felsch wrote:
>>>
>>> Hello Marco,
>>>
>>>>> The LDB driver was always written with parsing 'reg' out of the DT, so
>>>>
>>>> Not sure what you mean by always.
>>>
>>> By always, I mean since the very beginning.
>>
>> Marek, your below patch is not accepted(at least for now). In that patch,
>> register offset(s) are directly parsed by calling of_property_read_reg().
>> Without that patch, register offset(s) are determined via device data in
>> driver according to compatible string.
>>
>> [PATCH v3] drm/bridge: fsl-ldb: Parse register offsets from DT
>> https://lore.kernel.org/all/20260104213712.128982-1-marek.vasut@mailbox.org/
>>
>> [...]
>>
>>>
>>>>> encoding the register offsets into the driver was a mistake. The LDB
>>>>> controls two registers, which can be comfortably described in DT.
>>>>
>>>> Sorry but I have to disagree on this. It's no about if it's possible,
>>>> it's about if the abstraction is correct and IMHO the LDB is just one
>>>> subdevice of the syscon. For i.MX6SX the syscon is the iomuxc-gpr for
>>>> the i.MX8M and i.MX9 this is now a blkctrl.
>>>
>>> Right, and the "reg" DT property specifies at which offsets are the LDB
>>> control registers from the start of that blkctrl. What is the problem
>>> with that ?
>>
>> The problem is that ...
>>
>>>
>>> Look at e.g. imx8mp.dtsi as an example with blkctrl and LDB as a subnode
>>> with "reg" DT properties:
>>>
>>> 1938 media_blk_ctrl: blk-ctrl@32ec0000 {
>>> 1939 compatible = "fsl,imx8mp-media-blk-ctrl",
>>> 1940 "syscon";
>>> ...
>>> 2003 lvds_bridge: bridge@5c {
>>> 2004 compatible = "fsl,imx8mp-ldb";
>>> 2005 reg = <0x5c 0x4>, <0x128 0x4>;
>>> 2006 reg-names = "ldb", "lvds";
>>
>> ... i.MX8MP LVDS bridge node is fine with the reg property, but the property
>> is not allowed for i.MX93 LVDS bridge node according to commit[1] while
>> commit[2] requires the property for all LVDS bridge nodes. See the contradict
>> here?
>>
>> [1] 3feaa4342637 dt-bindings: soc: imx93-media-blk-ctrl: Add PDFC subnode to schema and example
>> [2] 8aa2f0ac08d3 dt-bindings: display: bridge: ldb: Add check for reg and reg-names
>>
>> To avoid the contradict, how about requiring the reg property only for i.MX6SX
>> and i.MX8MP LVDS bridge nodes and making it kind of optional for i.MX93 and
>> i.MX94 LVDS bridge nodes? Overall, in terms of the reg property, I feel the
>> LVDS bridge nodes look similar to reg-mux/mmio-mux(See reg-mux.yaml) where
>> the property is optional. BTW, there is a mux-controller node with 'mmio-mux'
>> compatible string in i.MX8mq syscon@30340000:
>>
>> iomuxc_gpr: syscon@30340000 {
>> compatible = "fsl,imx8mq-iomuxc-gpr", "syscon", "simple-mfd";
>> reg = <0x30340000 0x10000>;
>>
>> mux: mux-controller {
>> compatible = "mmio-mux";
>> #mux-control-cells = <1>;
>> mux-reg-masks = <0x34 0x00000004>; /* MIPI_MUX_SEL */
>> };
>> };
>>
>> We never know if HW designer would put a mux-controller next to a LVDS
>> bridge under a syscon device like gpr or blk-ctrl in future i.MX SoCs,
>> so the optional reg property would buy us some flexibility.
>>
>> The below patch is what I propose together with a Fixes tag for commit[2].
>> Since commit[2] is not in v6.19 and v7.0-rc5 was just released, it seems
>> that we have time to land the proposal fix if it makes sense. WDYT?
>
> Marek, Marco,
>
> Does Ying's proposed solution sound reasonable? Having the 'reg'
> property optional for i.MX93 and i.MX94 platforms seems like a good
> compromise. Can we move forward with this?
I only skimmed through it thus far, I need to read through it again when
time permits, after which I will reply to it.
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB
2026-03-23 7:22 ` Liu Ying
2026-03-25 8:02 ` Laurentiu Palcu
@ 2026-03-27 23:17 ` Marek Vasut
1 sibling, 0 replies; 21+ messages in thread
From: Marek Vasut @ 2026-03-27 23:17 UTC (permalink / raw)
To: Liu Ying, Marco Felsch
Cc: Laurentiu Palcu, imx, Andrzej Hajda, Neil Armstrong, Robert Foss,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, David Airlie,
Simona Vetter, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Marek Vasut, dri-devel, Frank Li, devicetree, linux-kernel
On 3/23/26 8:22 AM, Liu Ying wrote:
Hello Liu,
> ... i.MX8MP LVDS bridge node is fine with the reg property, but the property
> is not allowed for i.MX93 LVDS bridge node according to commit[1] while
> commit[2] requires the property for all LVDS bridge nodes. See the contradict
> here?
>
> [1] 3feaa4342637 dt-bindings: soc: imx93-media-blk-ctrl: Add PDFC subnode to schema and example
> [2] 8aa2f0ac08d3 dt-bindings: display: bridge: ldb: Add check for reg and reg-names
>
> To avoid the contradict, how about requiring the reg property only for i.MX6SX
> and i.MX8MP LVDS bridge nodes and making it kind of optional for i.MX93 and
> i.MX94 LVDS bridge nodes?
I would be fine with that, thanks !
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v8 4/9] dt-bindings: display: imx: Add i.MX94 DCIF
2026-03-04 11:34 [PATCH v8 0/9] Add support for i.MX94 DCIF Laurentiu Palcu
2026-03-04 11:34 ` [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB Laurentiu Palcu
@ 2026-03-04 11:34 ` Laurentiu Palcu
2026-03-04 11:34 ` [PATCH v8 6/9] dt-bindings: clock: nxp,imx95-blk-ctl: Add ldb child node Laurentiu Palcu
` (2 subsequent siblings)
4 siblings, 0 replies; 21+ messages in thread
From: Laurentiu Palcu @ 2026-03-04 11:34 UTC (permalink / raw)
To: imx, Philipp Zabel, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Frank Li, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam
Cc: dri-devel, Ying Liu, Laurentiu Palcu, devicetree,
linux-arm-kernel, linux-kernel
DCIF is the i.MX94 Display Controller Interface which is used to
drive a TFT LCD panel or connects to a display interface depending
on the chip configuration.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
---
.../bindings/display/imx/nxp,imx94-dcif.yaml | 82 ++++++++++++++++++++++
1 file changed, 82 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
new file mode 100644
index 0000000000000..fb25300e25529
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2025 NXP
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/nxp,imx94-dcif.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX94 Display Control Interface (DCIF)
+
+maintainers:
+ - Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
+
+description:
+ The Display Control Interface(DCIF) is a system master that fetches graphics
+ stored in memory and displays them on a TFT LCD panel or connects to a
+ display interface depending on the chip configuration.
+
+properties:
+ compatible:
+ const: nxp,imx94-dcif
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: CPU domain 0 (controlled by common registers group).
+ - description: CPU domain 1 (controlled by background layer registers group).
+ - description: CPU domain 2 (controlled by foreground layer registers group).
+
+ interrupt-names:
+ items:
+ - const: common
+ - const: bg_layer
+ - const: fg_layer
+
+ clocks:
+ maxItems: 3
+
+ clock-names:
+ items:
+ - const: apb
+ - const: axi
+ - const: pix
+
+ power-domains:
+ maxItems: 1
+
+ port:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description: Display Pixel Interface(DPI) output port
+
+ properties:
+ endpoint:
+ $ref: /schemas/media/video-interfaces.yaml#
+ unevaluatedProperties: false
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ display-controller@4b120000 {
+ compatible = "nxp,imx94-dcif";
+ reg = <0x4b120000 0x300000>;
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "common", "bg_layer", "fg_layer";
+ clocks = <&scmi_clk 69>, <&scmi_clk 70>, <&dispmix_csr 0>;
+ clock-names = "apb", "axi", "pix";
+ assigned-clocks = <&dispmix_csr 0>;
+ assigned-clock-parents = <&ldb_pll_pixel>;
+ power-domains = <&scmi_devpd 11>;
+ port {
+ dcif_out: endpoint {
+ remote-endpoint = <&ldb_in>;
+ };
+ };
+ };
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v8 6/9] dt-bindings: clock: nxp,imx95-blk-ctl: Add ldb child node
2026-03-04 11:34 [PATCH v8 0/9] Add support for i.MX94 DCIF Laurentiu Palcu
2026-03-04 11:34 ` [PATCH v8 1/9] dt-bindings: display: fsl,ldb: Add i.MX94 LDB Laurentiu Palcu
2026-03-04 11:34 ` [PATCH v8 4/9] dt-bindings: display: imx: Add i.MX94 DCIF Laurentiu Palcu
@ 2026-03-04 11:34 ` Laurentiu Palcu
2026-03-06 8:17 ` Liu Ying
2026-03-04 11:34 ` [PATCH v8 7/9] arm64: dts: imx943: Add display pipeline nodes Laurentiu Palcu
2026-03-04 11:34 ` [PATCH v8 8/9] arm64: dts: imx943-evk: Add display support using IT6263 Laurentiu Palcu
4 siblings, 1 reply; 21+ messages in thread
From: Laurentiu Palcu @ 2026-03-04 11:34 UTC (permalink / raw)
To: imx, Abel Vesa, Peng Fan, Michael Turquette, Stephen Boyd,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: dri-devel, Ying Liu, Laurentiu Palcu, linux-clk, devicetree,
linux-arm-kernel, linux-kernel
Since the BLK CTL registers, like the LVDS CSR, can be used to control the
LVDS Display Bridge controllers, add 'ldb' child node to handle
these use cases.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
---
.../bindings/clock/nxp,imx95-blk-ctl.yaml | 26 ++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
index 27403b4c52d62..85d64c4daf4c9 100644
--- a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
+++ b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
@@ -26,6 +26,12 @@ properties:
reg:
maxItems: 1
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
power-domains:
maxItems: 1
@@ -39,6 +45,11 @@ properties:
ID in its "clocks" phandle cell. See
include/dt-bindings/clock/nxp,imx95-clock.h
+patternProperties:
+ "^ldb@[0-9a-f]+$":
+ type: object
+ $ref: /schemas/display/bridge/fsl,ldb.yaml#
+
required:
- compatible
- reg
@@ -46,6 +57,21 @@ required:
- power-domains
- clocks
+allOf:
+ - if:
+ not:
+ properties:
+ compatible:
+ contains:
+ const: nxp,imx94-lvds-csr
+ then:
+ patternProperties:
+ "^ldb@[0-9a-f]+$": false
+ else:
+ required:
+ - '#address-cells'
+ - '#size-cells'
+
additionalProperties: false
examples:
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v8 6/9] dt-bindings: clock: nxp,imx95-blk-ctl: Add ldb child node
2026-03-04 11:34 ` [PATCH v8 6/9] dt-bindings: clock: nxp,imx95-blk-ctl: Add ldb child node Laurentiu Palcu
@ 2026-03-06 8:17 ` Liu Ying
0 siblings, 0 replies; 21+ messages in thread
From: Liu Ying @ 2026-03-06 8:17 UTC (permalink / raw)
To: Laurentiu Palcu, imx, Abel Vesa, Peng Fan, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: dri-devel, linux-clk, devicetree, linux-arm-kernel, linux-kernel,
Marco Felsch
On Wed, Mar 04, 2026 at 11:34:15AM +0000, Laurentiu Palcu wrote:
> Since the BLK CTL registers, like the LVDS CSR, can be used to control the
> LVDS Display Bridge controllers, add 'ldb' child node to handle
> these use cases.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> ---
> .../bindings/clock/nxp,imx95-blk-ctl.yaml | 26 ++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
> index 27403b4c52d62..85d64c4daf4c9 100644
> --- a/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
> +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml
> @@ -26,6 +26,12 @@ properties:
> reg:
> maxItems: 1
>
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 1
> +
> power-domains:
> maxItems: 1
>
> @@ -39,6 +45,11 @@ properties:
> ID in its "clocks" phandle cell. See
> include/dt-bindings/clock/nxp,imx95-clock.h
>
> +patternProperties:
> + "^ldb@[0-9a-f]+$":
Same to patch 1 comment, Marco said that LDB node should not have reg
property...
> + type: object
> + $ref: /schemas/display/bridge/fsl,ldb.yaml#
> +
> required:
> - compatible
> - reg
> @@ -46,6 +57,21 @@ required:
> - power-domains
> - clocks
>
> +allOf:
> + - if:
> + not:
> + properties:
> + compatible:
> + contains:
> + const: nxp,imx94-lvds-csr
> + then:
> + patternProperties:
> + "^ldb@[0-9a-f]+$": false
> + else:
> + required:
> + - '#address-cells'
> + - '#size-cells'
> +
> additionalProperties: false
>
> examples:
>
--
Regards,
Liu Ying
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v8 7/9] arm64: dts: imx943: Add display pipeline nodes
2026-03-04 11:34 [PATCH v8 0/9] Add support for i.MX94 DCIF Laurentiu Palcu
` (2 preceding siblings ...)
2026-03-04 11:34 ` [PATCH v8 6/9] dt-bindings: clock: nxp,imx95-blk-ctl: Add ldb child node Laurentiu Palcu
@ 2026-03-04 11:34 ` Laurentiu Palcu
2026-03-06 8:27 ` Liu Ying
2026-03-04 11:34 ` [PATCH v8 8/9] arm64: dts: imx943-evk: Add display support using IT6263 Laurentiu Palcu
4 siblings, 1 reply; 21+ messages in thread
From: Laurentiu Palcu @ 2026-03-04 11:34 UTC (permalink / raw)
To: imx, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: dri-devel, Ying Liu, Laurentiu Palcu, devicetree,
linux-arm-kernel, linux-kernel
Add display controller and LDB support in imx943.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
---
arch/arm64/boot/dts/freescale/imx943.dtsi | 53 ++++++++++++++++++++++++++++++-
1 file changed, 52 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi
index 657c81b6016f2..9a91beef54e86 100644
--- a/arch/arm64/boot/dts/freescale/imx943.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx943.dtsi
@@ -148,7 +148,7 @@ l3_cache: l3-cache {
};
};
- clock-ldb-pll-div7 {
+ clock_ldb_pll_div7: clock-ldb-pll-div7 {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clocks = <&scmi_clk IMX94_CLK_LDBPLL>;
@@ -174,9 +174,60 @@ dispmix_csr: syscon@4b010000 {
lvds_csr: syscon@4b0c0000 {
compatible = "nxp,imx94-lvds-csr", "syscon";
reg = <0x0 0x4b0c0000 0x0 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
clocks = <&scmi_clk IMX94_CLK_DISPAPB>;
#clock-cells = <1>;
power-domains = <&scmi_devpd IMX94_PD_DISPLAY>;
+
+ ldb: ldb@4 {
+ compatible = "fsl,imx94-ldb";
+ reg = <0x4 0x4>, <0x8 0x4>;
+ reg-names = "ldb", "lvds";
+ clocks = <&lvds_csr IMX94_CLK_DISPMIX_LVDS_CLK_GATE>;
+ clock-names = "ldb";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ lvds_in: endpoint {
+ remote-endpoint = <&dcif_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+ };
+ };
+ };
+
+ dcif: display-controller@4b120000 {
+ compatible = "nxp,imx94-dcif";
+ reg = <0x0 0x4b120000 0x0 0x300000>;
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "common", "bg_layer", "fg_layer";
+ clocks = <&scmi_clk IMX94_CLK_DISPAPB>,
+ <&scmi_clk IMX94_CLK_DISPAXI>,
+ <&dispmix_csr IMX94_CLK_DISPMIX_CLK_SEL>;
+ clock-names = "apb", "axi", "pix";
+ assigned-clocks = <&dispmix_csr IMX94_CLK_DISPMIX_CLK_SEL>;
+ assigned-clock-parents = <&clock_ldb_pll_div7>;
+ power-domains = <&scmi_devpd IMX94_PD_DISPLAY>;
+ status = "disabled";
+
+ port {
+ dcif_out: endpoint {
+ remote-endpoint = <&lvds_in>;
+ };
+ };
};
};
};
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v8 7/9] arm64: dts: imx943: Add display pipeline nodes
2026-03-04 11:34 ` [PATCH v8 7/9] arm64: dts: imx943: Add display pipeline nodes Laurentiu Palcu
@ 2026-03-06 8:27 ` Liu Ying
2026-06-12 12:02 ` Laurentiu Palcu
0 siblings, 1 reply; 21+ messages in thread
From: Liu Ying @ 2026-03-06 8:27 UTC (permalink / raw)
To: Laurentiu Palcu, imx, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam
Cc: dri-devel, devicetree, linux-arm-kernel, linux-kernel
On Wed, Mar 04, 2026 at 11:34:16AM +0000, Laurentiu Palcu wrote:
> Add display controller and LDB support in imx943.
>
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx943.dtsi | 53 ++++++++++++++++++++++++++++++-
> 1 file changed, 52 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi
> index 657c81b6016f2..9a91beef54e86 100644
> --- a/arch/arm64/boot/dts/freescale/imx943.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx943.dtsi
> @@ -148,7 +148,7 @@ l3_cache: l3-cache {
> };
> };
>
> - clock-ldb-pll-div7 {
> + clock_ldb_pll_div7: clock-ldb-pll-div7 {
> compatible = "fixed-factor-clock";
> #clock-cells = <0>;
> clocks = <&scmi_clk IMX94_CLK_LDBPLL>;
> @@ -174,9 +174,60 @@ dispmix_csr: syscon@4b010000 {
> lvds_csr: syscon@4b0c0000 {
> compatible = "nxp,imx94-lvds-csr", "syscon";
> reg = <0x0 0x4b0c0000 0x0 0x10000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> clocks = <&scmi_clk IMX94_CLK_DISPAPB>;
> #clock-cells = <1>;
> power-domains = <&scmi_devpd IMX94_PD_DISPLAY>;
> +
> + ldb: ldb@4 {
> + compatible = "fsl,imx94-ldb";
Should this be moved to imx94.dtsi, since the compatible string doesn't
seem to be i.MX943 specific?
> + reg = <0x4 0x4>, <0x8 0x4>;
> + reg-names = "ldb", "lvds";
> + clocks = <&lvds_csr IMX94_CLK_DISPMIX_LVDS_CLK_GATE>;
> + clock-names = "ldb";
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + lvds_in: endpoint {
> + remote-endpoint = <&dcif_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + };
> + };
> + };
> + };
> +
> + dcif: display-controller@4b120000 {
> + compatible = "nxp,imx94-dcif";
Same here.
> + reg = <0x0 0x4b120000 0x0 0x300000>;
> + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "common", "bg_layer", "fg_layer";
> + clocks = <&scmi_clk IMX94_CLK_DISPAPB>,
> + <&scmi_clk IMX94_CLK_DISPAXI>,
> + <&dispmix_csr IMX94_CLK_DISPMIX_CLK_SEL>;
> + clock-names = "apb", "axi", "pix";
> + assigned-clocks = <&dispmix_csr IMX94_CLK_DISPMIX_CLK_SEL>;
> + assigned-clock-parents = <&clock_ldb_pll_div7>;
> + power-domains = <&scmi_devpd IMX94_PD_DISPLAY>;
> + status = "disabled";
> +
> + port {
> + dcif_out: endpoint {
> + remote-endpoint = <&lvds_in>;
> + };
> + };
> };
> };
> };
>
--
Regards,
Liu Ying
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v8 7/9] arm64: dts: imx943: Add display pipeline nodes
2026-03-06 8:27 ` Liu Ying
@ 2026-06-12 12:02 ` Laurentiu Palcu
0 siblings, 0 replies; 21+ messages in thread
From: Laurentiu Palcu @ 2026-06-12 12:02 UTC (permalink / raw)
To: Liu Ying
Cc: imx, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, dri-devel,
devicetree, linux-arm-kernel, linux-kernel
Hi Ying,
On Fri, Mar 06, 2026 at 04:27:48PM +0800, Liu Ying wrote:
> On Wed, Mar 04, 2026 at 11:34:16AM +0000, Laurentiu Palcu wrote:
> > Add display controller and LDB support in imx943.
> >
> > Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx943.dtsi | 53 ++++++++++++++++++++++++++++++-
> > 1 file changed, 52 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx943.dtsi b/arch/arm64/boot/dts/freescale/imx943.dtsi
> > index 657c81b6016f2..9a91beef54e86 100644
> > --- a/arch/arm64/boot/dts/freescale/imx943.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx943.dtsi
> > @@ -148,7 +148,7 @@ l3_cache: l3-cache {
> > };
> > };
> >
> > - clock-ldb-pll-div7 {
> > + clock_ldb_pll_div7: clock-ldb-pll-div7 {
> > compatible = "fixed-factor-clock";
> > #clock-cells = <0>;
> > clocks = <&scmi_clk IMX94_CLK_LDBPLL>;
> > @@ -174,9 +174,60 @@ dispmix_csr: syscon@4b010000 {
> > lvds_csr: syscon@4b0c0000 {
> > compatible = "nxp,imx94-lvds-csr", "syscon";
> > reg = <0x0 0x4b0c0000 0x0 0x10000>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > clocks = <&scmi_clk IMX94_CLK_DISPAPB>;
> > #clock-cells = <1>;
> > power-domains = <&scmi_devpd IMX94_PD_DISPLAY>;
> > +
> > + ldb: ldb@4 {
> > + compatible = "fsl,imx94-ldb";
>
> Should this be moved to imx94.dtsi, since the compatible string doesn't
> seem to be i.MX943 specific?
Agreed, I moved them to imx94.dtsi in v9.
--
Thanks,
Laurentiu
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v8 8/9] arm64: dts: imx943-evk: Add display support using IT6263
2026-03-04 11:34 [PATCH v8 0/9] Add support for i.MX94 DCIF Laurentiu Palcu
` (3 preceding siblings ...)
2026-03-04 11:34 ` [PATCH v8 7/9] arm64: dts: imx943: Add display pipeline nodes Laurentiu Palcu
@ 2026-03-04 11:34 ` Laurentiu Palcu
2026-03-06 8:45 ` Liu Ying
4 siblings, 1 reply; 21+ messages in thread
From: Laurentiu Palcu @ 2026-03-04 11:34 UTC (permalink / raw)
To: imx, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: dri-devel, Ying Liu, Laurentiu Palcu, devicetree,
linux-arm-kernel, linux-kernel
The ITE IT6263 based NXP LVDS to HDMI converter can be attached to the
i.MX943 EVK board LVDS port using the mini-SAS connector. Since this is
the default configuration for the EVK, add support for it here.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
---
arch/arm64/boot/dts/freescale/imx943-evk.dts | 86 ++++++++++++++++++++++++++++
1 file changed, 86 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx943-evk.dts b/arch/arm64/boot/dts/freescale/imx943-evk.dts
index c8ceabe3d9239..0b69450566159 100644
--- a/arch/arm64/boot/dts/freescale/imx943-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx943-evk.dts
@@ -55,6 +55,36 @@ dmic: dmic {
#sound-dai-cells = <0>;
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&it6263_out>;
+ };
+ };
+ };
+
+ reg_1v8_ext: regulator-1v8-ext {
+ compatible = "regulator-fixed";
+ regulator-name = "1V8_EXT";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3v3_ext: regulator-3v3-ext {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3_EXT";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
reg_m2_pwr: regulator-m2-pwr {
compatible = "regulator-fixed";
regulator-name = "M.2-power";
@@ -179,6 +209,10 @@ memory@80000000 {
};
};
+&dcif {
+ status = "okay";
+};
+
&enetc1 {
clocks = <&scmi_clk IMX94_CLK_MAC4>;
clock-names = "ref";
@@ -217,6 +251,21 @@ &flexcan4 {
status = "okay";
};
+&ldb {
+ assigned-clocks = <&scmi_clk IMX94_CLK_LDBPLL_VCO>,
+ <&scmi_clk IMX94_CLK_LDBPLL>;
+ assigned-clock-rates = <4158000000>, <1039500000>;
+ status = "okay";
+
+ ports {
+ port@1 {
+ lvds_out: endpoint {
+ remote-endpoint = <&it6263_in>;
+ };
+ };
+ };
+};
+
&lpi2c3 {
clock-frequency = <400000>;
pinctrl-0 = <&pinctrl_lpi2c3>;
@@ -258,6 +307,43 @@ i2c@3 {
reg = <3>;
#address-cells = <1>;
#size-cells = <0>;
+
+ lvds-to-hdmi-bridge@4c {
+ compatible = "ite,it6263";
+ reg = <0x4c>;
+ data-mapping = "jeida-24";
+ reset-gpios = <&pcal6416_i2c3_u171 8 GPIO_ACTIVE_HIGH>;
+ ivdd-supply = <®_1v8_ext>;
+ ovdd-supply = <®_3v3_ext>;
+ txavcc18-supply = <®_1v8_ext>;
+ txavcc33-supply = <®_3v3_ext>;
+ pvcc1-supply = <®_1v8_ext>;
+ pvcc2-supply = <®_1v8_ext>;
+ avcc-supply = <®_3v3_ext>;
+ anvdd-supply = <®_1v8_ext>;
+ apvdd-supply = <®_1v8_ext>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ it6263_in: endpoint {
+ remote-endpoint = <&lvds_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ it6263_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+ };
};
i2c@4 {
--
2.51.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v8 8/9] arm64: dts: imx943-evk: Add display support using IT6263
2026-03-04 11:34 ` [PATCH v8 8/9] arm64: dts: imx943-evk: Add display support using IT6263 Laurentiu Palcu
@ 2026-03-06 8:45 ` Liu Ying
2026-06-12 12:06 ` Laurentiu Palcu
0 siblings, 1 reply; 21+ messages in thread
From: Liu Ying @ 2026-03-06 8:45 UTC (permalink / raw)
To: Laurentiu Palcu, imx, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam
Cc: dri-devel, devicetree, linux-arm-kernel, linux-kernel
On Wed, Mar 04, 2026 at 11:34:17AM +0000, Laurentiu Palcu wrote:
> The ITE IT6263 based NXP LVDS to HDMI converter can be attached to the
> i.MX943 EVK board LVDS port using the mini-SAS connector. Since this is
Since the LVDS to HDMI converter can be attached or detached to the EVK
board, it would be appropriate to use a DT overlay instead?
> the default configuration for the EVK, add support for it here.
>
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx943-evk.dts | 86 ++++++++++++++++++++++++++++
> 1 file changed, 86 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx943-evk.dts b/arch/arm64/boot/dts/freescale/imx943-evk.dts
> index c8ceabe3d9239..0b69450566159 100644
> --- a/arch/arm64/boot/dts/freescale/imx943-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx943-evk.dts
> @@ -55,6 +55,36 @@ dmic: dmic {
> #sound-dai-cells = <0>;
> };
>
> + hdmi-connector {
> + compatible = "hdmi-connector";
> + label = "hdmi";
> + type = "a";
> +
> + port {
> + hdmi_connector_in: endpoint {
> + remote-endpoint = <&it6263_out>;
> + };
> + };
> + };
> +
> + reg_1v8_ext: regulator-1v8-ext {
> + compatible = "regulator-fixed";
> + regulator-name = "1V8_EXT";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + reg_3v3_ext: regulator-3v3-ext {
> + compatible = "regulator-fixed";
> + regulator-name = "3V3_EXT";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> reg_m2_pwr: regulator-m2-pwr {
> compatible = "regulator-fixed";
> regulator-name = "M.2-power";
> @@ -179,6 +209,10 @@ memory@80000000 {
> };
> };
>
> +&dcif {
> + status = "okay";
> +};
> +
> &enetc1 {
> clocks = <&scmi_clk IMX94_CLK_MAC4>;
> clock-names = "ref";
> @@ -217,6 +251,21 @@ &flexcan4 {
> status = "okay";
> };
>
> +&ldb {
> + assigned-clocks = <&scmi_clk IMX94_CLK_LDBPLL_VCO>,
> + <&scmi_clk IMX94_CLK_LDBPLL>;
> + assigned-clock-rates = <4158000000>, <1039500000>;
> + status = "okay";
> +
> + ports {
> + port@1 {
> + lvds_out: endpoint {
> + remote-endpoint = <&it6263_in>;
> + };
> + };
> + };
> +};
> +
> &lpi2c3 {
> clock-frequency = <400000>;
> pinctrl-0 = <&pinctrl_lpi2c3>;
> @@ -258,6 +307,43 @@ i2c@3 {
> reg = <3>;
> #address-cells = <1>;
> #size-cells = <0>;
> +
> + lvds-to-hdmi-bridge@4c {
Maybe, change the node name to be "hdmi" to align with the nodes in
imx8mp-evk-lvds{0,1}-imx-lvds-hdmi-common.dtsi.
> + compatible = "ite,it6263";
> + reg = <0x4c>;
> + data-mapping = "jeida-24";
> + reset-gpios = <&pcal6416_i2c3_u171 8 GPIO_ACTIVE_HIGH>;
> + ivdd-supply = <®_1v8_ext>;
> + ovdd-supply = <®_3v3_ext>;
> + txavcc18-supply = <®_1v8_ext>;
> + txavcc33-supply = <®_3v3_ext>;
> + pvcc1-supply = <®_1v8_ext>;
> + pvcc2-supply = <®_1v8_ext>;
> + avcc-supply = <®_3v3_ext>;
> + anvdd-supply = <®_1v8_ext>;
> + apvdd-supply = <®_1v8_ext>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + it6263_in: endpoint {
> + remote-endpoint = <&lvds_out>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + it6263_out: endpoint {
> + remote-endpoint = <&hdmi_connector_in>;
> + };
> + };
> + };
> + };
> };
>
> i2c@4 {
>
--
Regards,
Liu Ying
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v8 8/9] arm64: dts: imx943-evk: Add display support using IT6263
2026-03-06 8:45 ` Liu Ying
@ 2026-06-12 12:06 ` Laurentiu Palcu
0 siblings, 0 replies; 21+ messages in thread
From: Laurentiu Palcu @ 2026-06-12 12:06 UTC (permalink / raw)
To: Liu Ying
Cc: imx, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, dri-devel,
devicetree, linux-arm-kernel, linux-kernel
Hi Ying,
On Fri, Mar 06, 2026 at 04:45:25PM +0800, Liu Ying wrote:
> On Wed, Mar 04, 2026 at 11:34:17AM +0000, Laurentiu Palcu wrote:
> > The ITE IT6263 based NXP LVDS to HDMI converter can be attached to the
> > i.MX943 EVK board LVDS port using the mini-SAS connector. Since this is
>
> Since the LVDS to HDMI converter can be attached or detached to the EVK
> board, it would be appropriate to use a DT overlay instead?
AFAIK, imx943 EVK ships with the IT6263 LVDS to HDMI adapter. So, I
believe it's preferable to have support for the adapter in the default
DTB instead of a DT overlay.
--
Thanks,
Laurentiu
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