Re: [PATCH 4/4] arm64: dts: qcom: shikra: Add support for AudioCoreCC node

[Imran Shaik <imran.shaik@oss.qualcomm.com>]

On 11-06-2026 04:55 pm, Konrad Dybcio wrote:
> On 6/5/26 1:26 PM, Imran Shaik wrote:
>> Add support for Audio Core Clock Controller (AudioCoreCC) node on Qualcomm
>> Shikra SoC. The CQM variant requires both clock and reset support, while
>> the CQS variant requires only reset support. Update the respective device
>> tree variants to enable and override the node as per variant requirements.
>>
>> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
>> ---
>>   arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts |  4 ++++
>>   arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts |  5 +++++
>>   arch/arm64/boot/dts/qcom/shikra.dtsi        | 13 +++++++++++++
>>   3 files changed, 22 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
>> index 0a52ab9b7a4c34d371f5ac23efe59d1c9d2723f4..0883c480bfbc80d7bead966b9ba932dee8a77bbf 100644
>> --- a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
>> +++ b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
>> @@ -23,6 +23,10 @@ chosen {
>>   	};
>>   };
>>   
>> +&audiocorecc {
>> +	status = "okay";
>> +};
>> +
>>   &sdhc_1 {
>>   	vmmc-supply = <&pm4125_l20>;
>>   	vqmmc-supply = <&pm4125_l14>;
>> diff --git a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
>> index b3f19a64d7aed3121ef092df684b19a4de39b497..b5e3d573868a836ad5e5e8eb3024cb5fb71dbb4e 100644
>> --- a/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
>> +++ b/arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
>> @@ -23,6 +23,11 @@ chosen {
>>   	};
>>   };
>>   
>> +&audiocorecc {
>> +	compatible = "qcom,shikra-cqs-audiocorecc";
>> +	status = "okay";
>> +};
>> +
>>   &sdhc_1 {
>>   	vmmc-supply = <&pm4125_l20>;
>>   	vqmmc-supply = <&pm4125_l14>;
>> diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
>> index a4334d99c1f35ee851ca8266ec37d4a200a07ee5..f15757d52af04d8cb5540354a239127cb0d174a3 100644
>> --- a/arch/arm64/boot/dts/qcom/shikra.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi
>> @@ -4,6 +4,7 @@
>>    */
>>   
>>   #include <dt-bindings/clock/qcom,rpmcc.h>
>> +#include <dt-bindings/clock/qcom,shikra-audiocorecc.h>
>>   #include <dt-bindings/clock/qcom,shikra-gcc.h>
>>   #include <dt-bindings/interconnect/qcom,icc.h>
>>   #include <dt-bindings/interconnect/qcom,rpm-icc.h>
>> @@ -640,6 +641,18 @@ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
>>   			};
>>   		};
>>   
>> +		audiocorecc: clock-controller@a0a0000 {
>> +			compatible = "qcom,shikra-cqm-audiocorecc";
>> +			reg = <0x0 0x0a0a0000 0x0 0x10000>,
> 
> This is called AUDIO_CORE_CC where seemingly all the clocks live
> 
>> +			      <0x0 0x0a0b4000 0x0 0x1000>;
> 
> and this is called AUDIO_CORE_CSR where seemingly all the resets live
> 
> so it would make sense to split them

Yes, the clocks and resets reside in different register spaces, I will 
split them into two different nodes as suggested. This will help to 
handle the CQM/CQS variants requirements more cleanly.

Thanks,
Imran