From: Jie Luo <quic_luoj@quicinc.com>
To: Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
<andersson@kernel.org>, <agross@kernel.org>,
<konrad.dybcio@linaro.org>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<catalin.marinas@arm.com>, <will@kernel.org>,
<p.zabel@pengutronix.de>
Cc: <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<quic_srichara@quicinc.com>
Subject: Re: [PATCH v9 4/4] clk: qcom: add clock controller driver for qca8386/qca8084
Date: Wed, 11 Oct 2023 19:26:31 +0800 [thread overview]
Message-ID: <49c8a8ff-bdb9-a523-9587-d2a46d401e41@quicinc.com> (raw)
In-Reply-To: <10bcb0cc-19db-4914-bbc4-ef79c238a70d@linaro.org>
On 10/11/2023 6:25 PM, Bryan O'Donoghue wrote:
> On 23/09/2023 12:21, Luo Jie wrote:
>> The clock controller driver of qca8386/qca8084 is registered
>> as the MDIO device, the hardware register is accessed by MDIO bus
>> that is normally used to access general PHY device, which is
>> different from the current existed qcom clock controller drivers
>> using ioremap to access hardware clock registers.
>
> "nsscc-qca8k is accessed via an MDIO bus"
>
>> MDIO bus is common utilized by both qca8386/qca8084 and other
>
> commonly
>
>> PHY devices, so the mutex lock mdio_bus->mdio_lock should be
>> used instead of using the mutex lock of remap.
>>
>> To access the hardware clock registers of qca8386/qca8084, there
>> is special MDIO frame sequence(three MDIO read/write operations)
>> need to be sent to device.
>
> "there is a special MDIO frame sequence"
>
> "which needs to be sent to the device"
I will update the comments, thanks Bryan.
>
> the following indentation splat from checkpatch
>
> CHECK: Alignment should match open parenthesis
> #2071: FILE: drivers/clk/qcom/nsscc-qca8k.c:2004:
> + ret = __mdiobus_write(bus, switch_phy_id, (reg |
> QCA8K_REG_DATA_UPPER_16_BITS),
> + upper_16_bits(val));
>
> CHECK: Alignment should match open parenthesis
> #2131: FILE: drivers/clk/qcom/nsscc-qca8k.c:2064:
> +static int qca8k_regmap_update_bits(void *context, unsigned int regaddr,
> + unsigned int mask, unsigned int value)
>
> total: 0 errors, 1 warnings, 2 checks, 2162 lines checked
>
> NOTE: For some of the reported defects, checkpatch may be able to
> mechanically convert to the typical style using --fix or
> --fix-inplace.
>
> 0004-clk-qcom-add-clock-controller-driver-for-qca8386-qca.patch has
> style problems, please review.
Thanks Bryan for the review. The code line mentioned by CHECK is more
than 100 columns, so i separate the lines.
>
> Once fixed
>
> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
next prev parent reply other threads:[~2023-10-11 11:26 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-23 11:21 [PATCH v9 0/4] add clock controller of qca8386/qca8084 Luo Jie
2023-09-23 11:21 ` [PATCH v9 1/4] clk: qcom: branch: Add clk_branch2_prepare_ops Luo Jie
2023-09-23 11:21 ` [PATCH v9 2/4] dt-bindings: clock: add qca8386/qca8084 clock and reset definitions Luo Jie
2023-09-23 11:21 ` [PATCH v9 3/4] clk: qcom: common: commonize qcom_cc_really_probe Luo Jie
2023-10-11 10:06 ` Bryan O'Donoghue
2023-09-23 11:21 ` [PATCH v9 4/4] clk: qcom: add clock controller driver for qca8386/qca8084 Luo Jie
2023-10-11 10:25 ` Bryan O'Donoghue
2023-10-11 11:26 ` Jie Luo [this message]
2023-10-11 11:32 ` Konrad Dybcio
2023-10-11 12:40 ` Jie Luo
2023-10-11 11:33 ` Bryan O'Donoghue
2023-10-11 12:42 ` Jie Luo
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