From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Luo Jie <jie.luo@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/3] arm64: dts: qcom: ipq5018: Enable mdio0 for SoC-integrated EPHY
Date: Wed, 2 Sep 2026 12:42:22 +0200 [thread overview]
Message-ID: <4a16a8ca-ab62-4248-a9c5-5362765ecd0b@oss.qualcomm.com> (raw)
In-Reply-To: <20260902-qcom_ipq5018_mdio_pinctrl-v3-2-629c7bb05c44@oss.qualcomm.com>
On 9/2/26 12:22 PM, Luo Jie wrote:
> mdio0 is the internal MDIO bus used to access the SoC-integrated
> EPHY (ge_phy), which is present on every IPQ5018 RDP board. Enable
> mdio0 with a 6.25MHz MDIO clock in the SoC dtsi so all boards can
> reach the EPHY, instead of enabling it per board.
>
> Signed-off-by: Luo Jie <jie.luo@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
next prev parent reply other threads:[~2026-09-02 10:42 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-02 10:22 [PATCH v3 0/3] arm64: dts: qcom: ipq5018: Add MDIO pinctrl and enable MDIO/PHY on RDP432-c2 Luo Jie
2026-09-02 10:22 ` [PATCH v3 1/3] arm64: dts: qcom: ipq5018: Add pinctrl for MDIO bus Luo Jie
2026-09-02 10:22 ` [PATCH v3 2/3] arm64: dts: qcom: ipq5018: Enable mdio0 for SoC-integrated EPHY Luo Jie
2026-09-02 10:42 ` Konrad Dybcio [this message]
2026-09-02 10:22 ` [PATCH v3 3/3] arm64: dts: qcom: ipq5018: Enable mdio1 and add QCA8081 PHY on rdp432-c2 Luo Jie
2026-09-02 10:42 ` Konrad Dybcio
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