From: Michael Walle <michael@walle.cc>
To: Claudiu.Beznea@microchip.com
Cc: Horatiu.Vultur@microchip.com, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, Nicolas.Ferre@microchip.com
Subject: Re: [PATCH] ARM: dts: lan966x: Fix the interrupt number for internal PHYs
Date: Tue, 13 Sep 2022 09:24:56 +0200 [thread overview]
Message-ID: <4c87e84176a8aaddbf906668b02fb1bc@walle.cc> (raw)
In-Reply-To: <51e33996-3ff8-69cd-392d-9d5d6298fe31@microchip.com>
Am 2022-09-13 09:18, schrieb Claudiu.Beznea@microchip.com:
> On 12.09.2022 22:26, Horatiu Vultur wrote:
>> According to the datasheet the interrupts for internal PHYs are
>> 80 and 81.
>>
>> Fixes: 6ad69e07def67c ("ARM: dts: lan966x: add MIIM nodes")
>> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
>
> Applied to at91-fixes, thanks!
I'm not sure the fix is correct, though.
-michael
prev parent reply other threads:[~2022-09-13 7:25 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-12 19:26 [PATCH] ARM: dts: lan966x: Fix the interrupt number for internal PHYs Horatiu Vultur
2022-09-13 7:18 ` Michael Walle
2022-09-13 7:57 ` Horatiu Vultur
2022-09-13 8:00 ` Michael Walle
2022-09-13 7:18 ` Claudiu.Beznea
2022-09-13 7:24 ` Michael Walle [this message]
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