From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Akari Tsuyukusa <akkun11.open@gmail.com>,
Sen Chu <sen.chu@mediatek.com>,
Sean Wang <sean.wang@mediatek.com>,
Macpaul Lin <macpaul.lin@mediatek.com>,
Lee Jones <lee@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Flora Fu <flora.fu@mediatek.com>,
Alexandre Mergnat <amergnat@baylibre.com>
Cc: "open list:MEDIATEK BOARD LEVEL SHUTDOWN DRIVERS"
<linux-pm@vger.kernel.org>,
"open list:MULTIFUNCTION DEVICES (MFD)" <mfd@lists.linux.dev>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"open list:ARM/Mediatek SoC support"
<linux-kernel@vger.kernel.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-arm-kernel@lists.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH 1/3] dt-bindings: soc: mediatek: pwrap: Add compatible for MT6589 SoC
Date: Mon, 20 Jul 2026 15:27:11 +0200 [thread overview]
Message-ID: <4fa4fb82-2118-4ddf-9b8c-510b58835b5f@collabora.com> (raw)
In-Reply-To: <20260716171733.300885-2-akkun11.open@gmail.com>
On 7/16/26 19:17, Akari Tsuyukusa wrote:
> Add compatible string for MediaTek MT6589 PWRAP.
> Also update the description since MT6589 has pwrap bridge.
>
> Signed-off-by: Akari Tsuyukusa <akkun11.open@gmail.com>
> ---
> .../devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml
> index e7c4a3984c60..a487ed39e6cb 100644
> --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml
> +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml
> @@ -19,8 +19,8 @@ description:
>
> IP Pairing
>
> - On MT8135 the pins of some SoC internal peripherals can be on the PMIC.
> - The signals of these pins are routed over the SPI bus using the pwrap
> + On MT6589 and MT8135, the pins of some SoC internal peripherals can be on the
Soon, this will become
"On MT6589, MT8135, MT1234, MT3456, MT...." :-)
So, perhaps, it's a better idea if we say:
"In some SoCs, some of the internal peripherals may be accessible only
through the PMIC.
The signals of these pins are routed (blahblah)"
Cheers,
Angelo
next prev parent reply other threads:[~2026-07-20 13:27 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-16 17:17 [PATCH 0/3] soc: mediatek: pwrap: MT6589 + MT6320 support Akari Tsuyukusa
2026-07-16 17:17 ` [PATCH 1/3] dt-bindings: soc: mediatek: pwrap: Add compatible for MT6589 SoC Akari Tsuyukusa
2026-07-16 17:30 ` sashiko-bot
2026-07-20 13:27 ` AngeloGioacchino Del Regno [this message]
2026-07-16 17:17 ` [PATCH 2/3] dt-bindings: mfd: mediatek: mt6397: add MT6320 compatible string Akari Tsuyukusa
2026-07-16 17:24 ` sashiko-bot
2026-07-16 17:17 ` [PATCH 3/3] soc: mediatek: pwrap: add MT6589 PWARP and MT6320 PMIC support Akari Tsuyukusa
2026-07-16 17:27 ` sashiko-bot
2026-07-17 6:58 ` Akari Tsuyukusa
2026-07-20 13:27 ` AngeloGioacchino Del Regno
2026-07-17 7:01 ` [PATCH 0/3] soc: mediatek: pwrap: MT6589 + MT6320 support Akari Tsuyukusa
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