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From: Krzysztof Kozlowski <krzk@kernel.org>
To: rohan1sj@cadence.com, Ulf Hansson <ulfh@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Masahiro Yamada <yamada.masahiro@socionext.com>,
	Adrian Hunter <adrian.hunter@intel.com>
Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, mparab@cadence.com,
	pawell@cadence.com, sjakhade@cadence.com, mpillai@cadence.com,
	razb@mobileye.com, blarson@amd.com
Subject: Re: [PATCH v4 1/2] dt-bindings: mmc: cdns,sdhci: Add CQE support
Date: Tue, 25 Aug 2026 13:35:40 +0200	[thread overview]
Message-ID: <519d44cc-2a67-4f15-addc-774ed8dfdb98@kernel.org> (raw)
In-Reply-To: <20260825-cdns_sdhci_cqe-support-v4-1-e9f72e338373@cadence.com>

On 25/08/2026 13:10, Rohan Joshi via B4 Relay wrote:
> From: Rohan Joshi <rohan1sj@cadence.com>
> 
> Add optional named resource "cqhci" to map the CQE
> register space. When present, it is used for CQHCI
> initialization and enable Command Queue Engine for eMMC.
> 
> The "cqhci" space is optional to maintain compatibility
> for platforms that don't have CQE block. When absent, the
> controller can operate without the CQE block as routined.

routined? routed? What did you want to say?

Which platforms do not have CQE? Usually devices NOT having something
should have this resource disallowed/restricted. But your binding says
all devices have cqhci

> 
> Update amd,pensando-elba platform to include this resource
> since Elba does have hardware block required for CQE! The
> original author for Elba, Brad Larson (blarson@amd.com)
> was able to confirm the CQE support.


Please wrap commit message according to Linux coding style / submission
process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597

> 
> Signed-off-by: Rohan Joshi <rohan1sj@cadence.com>
> ---
>  .../devicetree/bindings/mmc/cdns,sdhci.yaml        | 28 +++++++++++++++++++---
>  1 file changed, 25 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> index 6c7317d13aa6..10bc9ac2073a 100644
> --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> @@ -22,7 +22,14 @@ properties:
>  
>    reg:
>      minItems: 1
> -    maxItems: 2
> +    maxItems: 3
> +
> +  reg-names:
> +    minItems: 1
> +    items:
> +      - const: hc
> +      - enum: [bctl, cqhci]
> +      - const: cqhci
>  
>    interrupts:
>      maxItems: 1
> @@ -131,13 +138,27 @@ allOf:
>      then:
>        properties:
>          reg:
> +          minItems: 2
>            items:
>              - description: Host controller registers
>              - description: Elba byte-lane enable register for writes
> +            - description: CQE (Command Queuing Engine) registers (optional)

Schema says what is optional, do not repeat it in free form text.

> +        reg-names:
> +          minItems: 2
> +          items:
> +            - const: hc
> +            - const: bctl
> +            - const: cqhci

So are the names required now? If not then how does your driver work?

>      else:
>        properties:
>          reg:
> -          maxItems: 1
> +          items:
> +            - description: Host Controller registers
> +            - description: CQE (Command Queuing Engine) registers (optional)
> +        reg-names:
> +          items:
> +            - const: hc
> +            - const: cqhci

So now all devices have exactly two entries?

>  
>  unevaluatedProperties: false
>  
> @@ -145,7 +166,8 @@ examples:
>    - |
>      emmc: mmc@5a000000 {
>          compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
> -        reg = <0x5a000000 0x400>;
> +        reg = <0x5a000000 0x400>, <0x5a000400 0x060>;
> +        reg-names = "hc", "cqhci";
>          interrupts = <0 78 4>;
>          clocks = <&clk 4>;
>          bus-width = <8>;
> 


Best regards,
Krzysztof

  parent reply	other threads:[~2026-08-25 11:35 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-25 11:10 [PATCH v4 0/2] CQE support for cadence eMMC host controller Rohan Joshi via B4 Relay
2026-08-25 11:10 ` [PATCH v4 1/2] dt-bindings: mmc: cdns,sdhci: Add CQE support Rohan Joshi via B4 Relay
2026-08-25 11:17   ` sashiko-bot
2026-08-25 11:35   ` Krzysztof Kozlowski [this message]
2026-08-25 11:10 ` [PATCH v4 2/2] mmc: sdhci-cadence: " Rohan Joshi via B4 Relay
2026-08-25 11:24   ` sashiko-bot
2026-08-25 11:38   ` Krzysztof Kozlowski
2026-08-27 12:20   ` Adrian Hunter

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