From: Qiang Yu <qiang.yu@oss.qualcomm.com>
To: "Wenbin Yao (Consultant)" <quic_wenbyao@quicinc.com>,
Bjorn Helgaas <helgaas@kernel.org>
Cc: lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org,
robh@kernel.org, bhelgaas@google.com, sfr@canb.auug.org.au,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
andersson@kernel.org, konradybcio@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, krishna.chundru@oss.qualcomm.com,
quic_vbadigan@quicinc.com, quic_mrana@quicinc.com,
quic_cang@quicinc.com
Subject: Re: [PATCH v5 1/3] PCI: dwc: enable PCI Power Control Slot driver for QCOM
Date: Mon, 11 Aug 2025 17:25:10 +0800 [thread overview]
Message-ID: <571a76a1-c430-49a5-a8b6-974f71a6437b@oss.qualcomm.com> (raw)
In-Reply-To: <a243dc20-6b48-425f-ae43-786d347b2458@quicinc.com>
On 7/24/2025 10:52 AM, Wenbin Yao (Consultant) wrote:
> On 7/23/2025 7:22 AM, Bjorn Helgaas wrote:
>> In subject:
>>
>> PCI: qcom: Enable PCI Power Control Slot driver
>>
>> This is not a generic dwc change; it's specific to qcom, so I want the
>> subject to reflect that.
>>
>> We can fix this when applying unless other changes are needed.
>
> OK, will fix it.
Hi Bjorn, we have nothing to update, will not send new version, could you
please pick up patches and fix this when applying if there is no further
comments?
- Qiang Yu>
>>
>> On Tue, Jul 22, 2025 at 05:11:49PM +0800, Wenbin Yao wrote:
>>> From: Qiang Yu <qiang.yu@oss.qualcomm.com>
>>>
>>> Enable the pwrctrl driver, which is utilized to manage the power supplies
>>> of the devices connected to the PCI slots. This ensures that the voltage
>>> rails of the standard PCI slots on some platforms eg. X1E80100-QCP can be
>>> correctly turned on/off if they are described under PCIe port device tree
>>> node.
>>>
>>> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
>>> Signed-off-by: Wenbin Yao <quic_wenbyao@quicinc.com>
>>> ---
>>> drivers/pci/controller/dwc/Kconfig | 1 +
>>> 1 file changed, 1 insertion(+)
>>>
>>> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
>>> index ff6b6d9e1..deafc512b 100644
>>> --- a/drivers/pci/controller/dwc/Kconfig
>>> +++ b/drivers/pci/controller/dwc/Kconfig
>>> @@ -298,6 +298,7 @@ config PCIE_QCOM
>>> select CRC8
>>> select PCIE_QCOM_COMMON
>>> select PCI_HOST_COMMON
>>> + select PCI_PWRCTRL_SLOT
>>> help
>>> Say Y here to enable PCIe controller support on Qualcomm SoCs. The
>>> PCIe controller uses the DesignWare core plus Qualcomm-specific
>>> --
>>> 2.34.1
>>>
next prev parent reply other threads:[~2025-08-11 9:25 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-22 9:11 [PATCH v5 0/3] arm64: qcom: x1e80100-qcp: Add power supply and sideband signals for PCIe RC Wenbin Yao
2025-07-22 9:11 ` [PATCH v5 1/3] PCI: dwc: enable PCI Power Control Slot driver for QCOM Wenbin Yao
2025-07-22 23:22 ` Bjorn Helgaas
2025-07-24 2:52 ` Wenbin Yao (Consultant)
2025-08-11 9:25 ` Qiang Yu [this message]
2025-07-23 14:34 ` Manivannan Sadhasivam
2025-07-24 3:24 ` Wenbin Yao (Consultant)
2025-07-22 9:11 ` [PATCH v5 2/3] arm64: dts: qcom: x1e80100: add bus topology for PCIe domain 3 Wenbin Yao
2025-07-22 9:11 ` [PATCH v5 3/3] arm64: dts: qcom: x1e80100-qcp: enable pcie3 x8 slot for X1E80100-QCP Wenbin Yao
2025-08-11 10:32 ` (subset) [PATCH v5 0/3] arm64: qcom: x1e80100-qcp: Add power supply and sideband signals for PCIe RC Manivannan Sadhasivam
2025-08-11 23:27 ` Bjorn Andersson
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