From: Andrew Lunn <andrew@lunn.ch>
To: BG9OXA <bg9oxa@163.com>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 2/2] arm64: dts: rockchip: add ALIENTEK QuarkPi-CA2
Date: Sun, 4 Oct 2026 23:12:22 +0200 [thread overview]
Message-ID: <596745ab-8f98-4e5b-9105-3215a46780a4@lunn.ch> (raw)
In-Reply-To: <20261001-b4-quarkpi-ca2-v5-2-e19296802978@163.com>
On Thu, Oct 01, 2026 at 11:19:47PM +0800, BG9OXA wrote:
> The QuarkPi-CA2 is an RK3588S based single board computer with LPDDR4X
> RAM, eMMC, microSD, one Gigabit Ethernet port (YT8531 PHY), HDMI 2.1,
> DisplayPort over USB-C, M.2 PCIe 2.0 x1, USB 2.0 and 3.0 host ports,
> an ES8388 audio codec with headphone amplifier, a MIPI CSI camera
> connector, an IR receiver, a PWM controlled fan, ADC keys and a 40-pin
> GPIO header.
>
> The GbE MAC receives its reference clock from the PHY, and the PHY keeps
> its clock output enabled while the link is down so that the MAC can be
> initialised.
>
> The MDIO bus is described with separate mdio and mdio-child nodes, and
> the RK3588S RGMII delays are applied on the MAC side (tx_delay).
>
> Signed-off-by: BG9OXA <bg9oxa@163.com>
I assume BG9OXA is a radio call sign. So it is unique, and nationally
assigned.
https://www.kernel.org/doc/html/latest/process/submitting-patches.html
says it needs to be "a known identity". I've no idea if a call sign
qualifies. Signed-off-by: is considered a legal statement....
> +&gmac1 {
> + phy-mode = "rgmii-id";
> + clock_in_out = "input";
> +
> + snps,reset-gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
> + snps,reset-active-low;
> + snps,reset-delays-us = <0 20000 100000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac1_miim
> + &gmac1_tx_bus2
> + &gmac1_rx_bus2
> + &gmac1_rgmii_clk
> + &gmac1_rgmii_bus
> + &gmac1_clkinout>;
> +
> + phy-handle = <&rgmii_phy1>;
> + status = "okay";
> +};
> +
> +&mdio1 {
> + rgmii_phy1: ethernet-phy@1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0x1>;
> +
> + motorcomm,clk-out-frequency-hz = <125000000>;
> + motorcomm,keep-pll-enabled;
> + };
> +};
For these two nodes only:
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
prev parent reply other threads:[~2026-10-04 21:12 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-01 15:19 [PATCH v5 0/2] arm64: dts: rockchip: add ALIENTEK QuarkPi-CA2 BG9OXA
2026-10-01 15:19 ` [PATCH v5 1/2] dt-bindings: arm: " BG9OXA
2026-10-01 15:19 ` [PATCH v5 2/2] arm64: dts: " BG9OXA
2026-10-01 15:31 ` sashiko-bot
2026-10-04 21:12 ` Andrew Lunn [this message]
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