From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Taniya Das <quic_tdas@quicinc.com>,
Jonathan Marek <jonathan@marek.ca>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Bryan O'Donoghue <bod@kernel.org>,
Vikash Garodia <vikash.garodia@oss.qualcomm.com>,
Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Stanimir Varbanov <stanimir.varbanov@linaro.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Hans Verkuil <hverkuil@kernel.org>,
Stefan Schmidt <stefan.schmidt@linaro.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
Dikshita Agarwal <dikshita@qti.qualcomm.com>,
Ulf Hansson <ulfh@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, linux-media@vger.kernel.org,
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Subject: Re: [PATCH v7 1/2] arm64: dts: qcom: sm8250: sort out Iris power domains
Date: Wed, 10 Jun 2026 14:24:24 +0200 [thread overview]
Message-ID: <5eaea87f-5fed-4869-93e5-55c9da5ced84@oss.qualcomm.com> (raw)
In-Reply-To: <20260604-iris-venus-fix-sm8250-v7-1-7bd2f0e5bae8@oss.qualcomm.com>
On 6/4/26 6:22 PM, Dmitry Baryshkov wrote:
> On SM8250 Iris core requires two power rails to function, MX (for PLLs)
> and MMCX (for everything else). The commit fa245b3f06cd ("arm64: dts:
> qcom: sm8250: Add venus DT node") added only MX power rail, but omitted
> MMCX voltage levels.
>
> Add MMCX domain to the Iris device node.
>
> Fixes: fa245b3f06cd ("arm64: dts: qcom: sm8250: Add venus DT node")
> Reported-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
[...]
> opp-720000000 {
> opp-hz = /bits/ 64 <720000000>;
> - required-opps = <&rpmhpd_opp_low_svs>;
> + required-opps = <&rpmhpd_opp_svs>,
> + <&rpmhpd_opp_low_svs>;
So the computer tells me low_svs would be enough for PLL0 to generate 720MHz
Is there some transient dependency that bumps this to svs?
Your changelog mentions you altered this in v6, but I don't see any related
discussion
Konrad
next prev parent reply other threads:[~2026-06-10 12:24 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-04 16:22 [PATCH v7 0/2] arm64: dts: qcom: fix power domain handling on SM8250 Dmitry Baryshkov
2026-06-04 16:22 ` [PATCH v7 1/2] arm64: dts: qcom: sm8250: sort out Iris power domains Dmitry Baryshkov
2026-06-04 16:42 ` sashiko-bot
2026-06-09 6:00 ` Vishnu Reddy
2026-06-10 12:20 ` Konrad Dybcio
2026-06-10 12:24 ` Konrad Dybcio [this message]
2026-06-10 13:34 ` Dmitry Baryshkov
2026-06-10 13:52 ` Konrad Dybcio
2026-06-12 7:55 ` Dmitry Baryshkov
2026-06-16 11:52 ` Konrad Dybcio
2026-06-04 16:22 ` [PATCH v7 2/2] arm64: dts: qcom: sm8250: correct frequencies in the Iris OPP table Dmitry Baryshkov
2026-06-09 5:47 ` Vishnu Reddy
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