Re: [PATCH 1/2] dt-bindings: clock: airoha: Add PHY binding for Serdes port

[Christian Marangi <ansuelsmth@gmail.com>]

On Mon, Jul 27, 2026 at 04:05:43PM -0400, Brian Masney wrote:
> Hi Christian,
> 
> On Fri, Jul 24, 2026 at 08:43:01PM +0200, Christian Marangi wrote:
> > Add PHY cell property for Serdes port selection. Currently supported only
> > for Airoha AN7581 SoC, that support up to 4 Serdes port.
> > 
> > The Serdes port can support both PCIe, USB3 or Ethernet mode.
> > 
> > - PCIe1 Serdes can support PCIe or Ethernet mode.
> > - PCIe2 Serdes can support PCIe or Ethernet mode.
> > - USB1 Serdes can support USB3 or HSGMII mode.
> > - USB2 Serdes can support USB3 or PCIe mode.
> > 
> > Add bindings to permit correct reference of the Serdes ports in DT.
> > Values are just symbolic and enumerates the Serdes port with a specific
> > number for precise reference.
> > 
> > The available Serdes port can be selected following the dt-binding header
> > in [2].
> > 
> > [2] <include/dt-bindings/soc/airoha,scu-ssr.h>
> > 
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > ---
> >  .../bindings/clock/airoha,en7523-scu.yaml     | 24 ++++++++++++++++---
> >  include/dt-bindings/soc/airoha,scu-ssr.h      | 11 +++++++++
> >  2 files changed, 32 insertions(+), 3 deletions(-)
> >  create mode 100644 include/dt-bindings/soc/airoha,scu-ssr.h
> > 
> > diff --git a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
> > index eb24a5687639..fc37786ac7ed 100644
> > --- a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
> > +++ b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml
> > @@ -23,6 +23,7 @@ description: |
> >  
> >    All these identifiers can be found in:
> >    [1]: <include/dt-bindings/clock/en7523-clk.h>.
> > +  [2]: <include/dt-bindings/soc/airoha,scu-ssr.h>.
> >  
> >    The clocks are provided inside a system controller node.
> >  
> > @@ -50,6 +51,12 @@ properties:
> >      description: ID of the controller reset line
> >      const: 1
> >  
> > +  '#phy-cells':
> > +    description:
> > +      The first cell indicates the serdes phy number, see [2] for the
> > +      available serdes port.
> > +    const: 1
> > +
> >  required:
> >    - compatible
> >    - reg
> > @@ -65,12 +72,23 @@ allOf:
> >          reg:
> >            minItems: 2
> >  
> > +        '#phy-cells': false
> > +
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          const: econet,en751221-scu
> > +    then:
> > +      properties:
> > +        reg:
> > +          maxItems: 1
> > +
> > +        '#phy-cells': false
> > +
> >    - if:
> >        properties:
> >          compatible:
> > -          enum:
> > -            - airoha,en7581-scu
> > -            - econet,en751221-scu
> > +          const: airoha,en7581-scu
> >      then:
> >        properties:
> >          reg:
> 
> This chunk is new since the split out v10 series[1]. I see that you dropped
> krzk's Reviewed-by presumably because of the new chunk. However I don't
> see a changelog.
> 
> I'm collecting patches up for a clk pull to Stephen. (I'm not sure if
> he's going to pull but I'm going to try.) I'm not going to include this
> series until I see a Reviewed-by by one of the dt maintainers on the new
> patch.
> 
> https://lore.kernel.org/all/20260702093812.15918-2-ansuelsmth@gmail.com/
>

Hi Brian,

yes all correct. I dropped as the patch changed (change is trivial but not
correct)

It's ok as long as stuff gets eventually picked ahahah 

-- 
	Ansuel