From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Sneh Mankad <sneh.mankad@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Thomas Gleixner <tglx@kernel.org>,
Shawn Guo <shawn.guo@linaro.org>, Marc Zyngier <maz@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 7/7] arm64: dts: qcom: shikra: Add CPU idle states
Date: Wed, 19 Aug 2026 15:46:11 +0200 [thread overview]
Message-ID: <6f7d63af-9a4e-45e7-a2f9-e6c97598a140@oss.qualcomm.com> (raw)
In-Reply-To: <fc24d80d-c970-458d-a912-1d5f18a3a4b6@oss.qualcomm.com>
On 8/3/26 12:33 PM, Sneh Mankad wrote:
>
>
> On 15-Jul-26 3:32 PM, Konrad Dybcio wrote:
>> On 7/13/26 12:25 PM, Sneh Mankad wrote:
>>> Add idle states for the CPUs as well as the whole cluster. This enables
>>> deeper-than-WFI cpuidle.
>>>
>>> Add MPM under cluster_pd power domain.
>>>
>>> Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
>>> ---
>>
>> [...]
>>
>>> + domain_idle_states: domain-idle-states {
>>> + cluster_sleep_apss_off: cluster-sleep-0 {
>>> + compatible = "domain-idle-state";
>>> + idle-state-name = "cluster-power-down";
>>> + arm,psci-suspend-param = <0x41000044>;
>>> + entry-latency-us = <2752>;
>>> + exit-latency-us = <3038>;
>>> + min-residency-us = <6118>;
>>> + };
>>> + };
>>
>> Is this really the deepest state available on Shikra?
>
> Yes, this is the deepest idle state for Shikra. It does involve
> handshaking with RPM to allow SoC level idle states to enter.
Ok, thanks for confirming, the number seemed low.
Konrad
prev parent reply other threads:[~2026-08-19 13:46 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-13 10:25 [PATCH 0/7] Register MPM under CPU cluster power domain to manage RPM notification Sneh Mankad
2026-07-13 10:25 ` [PATCH 1/7] dt-bindings: interrupt-controller: mpm: Document power-domains property Sneh Mankad
2026-07-13 10:36 ` sashiko-bot
2026-07-13 11:26 ` Konrad Dybcio
2026-08-03 5:28 ` Sneh Mankad
2026-07-13 15:11 ` Marc Zyngier
2026-07-15 6:38 ` Marek Szyprowski
2026-07-15 8:54 ` Marc Zyngier
2026-08-03 10:28 ` Sneh Mankad
2026-08-03 19:21 ` Dmitry Baryshkov
2026-07-21 9:06 ` Krzysztof Kozlowski
2026-08-03 5:30 ` Sneh Mankad
2026-08-03 19:21 ` Dmitry Baryshkov
2026-07-13 10:25 ` [PATCH 2/7] irqchip/irq-qcom-mpm: Register MPM under CPU cluster power domain Sneh Mankad
2026-07-13 10:41 ` sashiko-bot
2026-07-15 9:46 ` Konrad Dybcio
2026-07-15 10:34 ` Stephan Gerhold
2026-07-15 10:45 ` Konrad Dybcio
2026-07-15 10:49 ` Stephan Gerhold
2026-07-15 11:11 ` Konrad Dybcio
2026-07-21 22:18 ` Dmitry Baryshkov
2026-07-22 8:29 ` Konrad Dybcio
2026-08-03 10:58 ` Sneh Mankad
2026-08-19 13:49 ` Konrad Dybcio
2026-07-13 10:25 ` [PATCH 3/7] irqchip/irq-qcom-mpm: Prepare common access path for timer and pin regs Sneh Mankad
2026-07-13 10:39 ` sashiko-bot
2026-07-15 9:59 ` Konrad Dybcio
2026-07-13 10:25 ` [PATCH 4/7] irqchip/irq-qcom-mpm: Program wakeup timer when CPU cluster goes to LPM Sneh Mankad
2026-07-13 10:38 ` sashiko-bot
2026-07-13 15:18 ` Marc Zyngier
2026-08-03 11:03 ` Sneh Mankad
2026-07-13 10:25 ` [PATCH 5/7] arm64: dts: qcom: sm6375: Make MPM device as part of CPU cluster domain Sneh Mankad
2026-07-13 10:40 ` sashiko-bot
2026-07-13 10:25 ` [PATCH 6/7] arm64: dts: qcom: agatti: Do not mark MPM as power domain Sneh Mankad
2026-07-13 10:39 ` sashiko-bot
2026-07-15 10:01 ` Konrad Dybcio
2026-07-21 22:22 ` Dmitry Baryshkov
2026-07-22 8:28 ` Konrad Dybcio
2026-07-22 12:40 ` Dmitry Baryshkov
2026-08-03 10:37 ` Sneh Mankad
2026-07-21 22:21 ` Dmitry Baryshkov
2026-07-13 10:25 ` [PATCH 7/7] arm64: dts: qcom: shikra: Add CPU idle states Sneh Mankad
2026-07-15 10:02 ` Konrad Dybcio
2026-08-03 10:33 ` Sneh Mankad
2026-08-19 13:46 ` Konrad Dybcio [this message]
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