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From: Anusha Arun Nandi <anusha.nandi@oss.qualcomm.com>
To: Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
	david@ixit.cz, andersson@kernel.org, konradybcio@kernel.org,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	bod@kernel.org, vladimir.zapolskiy@linaro.org,
	loic.poulain@oss.qualcomm.com, mchehab@kernel.org
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	gjorgji.rosikopulos@oss.qualcomm.com,
	jigarkumar.zala@oss.qualcomm.com,
	hariram.purushothaman@oss.qualcomm.com, akapatra@quicinc.com,
	linux-media@vger.kernel.org,
	krzysztof.kozlowski@oss.qualcomm.com, daniel@quora.org,
	konrad.dybcio@oss.qualcomm.com, christopher.obbard@linaro.org,
	alex.vinarskis@gmail.com
Subject: Re: [PATCH 1/3] phy: core: add generic MIPI C-PHY configuration API
Date: Fri, 23 Oct 2026 16:20:42 -0700	[thread overview]
Message-ID: <8741d667-efdd-4e3f-a1b2-2f04255d7c7d@oss.qualcomm.com> (raw)
In-Reply-To: <e3d322a0-43d5-4369-bd09-128152f4b233@linaro.org>

On 10/22/2026 7:15 PM, Bryan O'Donoghue wrote:
> On 23/10/2026 01:33, Anusha Arun Nandi wrote:
>>>> +    if (!cfg || !lanes)
>>>> +        return -EINVAL;
>>> Lanes must be a multiple of three to be valid, at least for your three
>>> submissions to be logically consistent, this statement must be so.
>>>
>> I will update the name of lanes to data_lanes in
>> phy_configure_opts_mipi_cphy struct.
>> I will add more sanity checks for data_lanes > 3, as C-PHY supports 3
>> data lanes only.
> 
> Sorry the only thing weirder than arguing with other people on the
> internet is arguing with yourself.
> 
> I argued myself down from this.
> 
> =>
> 
> One CPHY lane is 3 three wires. So data-lanes = <1> means three wire
> that only the PHY driver understands.
> 
> We communicate in lanes not in pads. There is no meaningful way to
> specify pads in DT - only lanes.
> 
> Which means lanes - I think we should follow what struct phy_mipi_dphy
> already models for us:
> 
> /**
>  * struct phy_configure_opts_mipi_dphy - MIPI D-PHY configuration set
>  *
>  * This structure is used to represent the configuration state of a
>  * MIPI D-PHY phy.
>  */
> struct phy_configure_opts_mipi_dphy {
> 
>         /**
>          * @lanes:
>          *
>          * Number of active, consecutive, data lanes, starting from
>          * lane 0, used for the transmissions.
>          */
>         unsigned char           lanes;
> };
> 
> For example in DPHY lane == "two pads on the SoC" so for us in CPHY mode
> lane == "three pads on the SoC", there's no need to deviate from that.
> 
Ack. We will keep it as lanes.
> The CSID needs to know the symbol rate - so that it can vote on the
> appropriate NOC/CamNOC clocks/rails but... does the PHY driver itself
> need to know that ? It does not, symbol_rate is not required in this
> struct no more than it is in DPHY.
> 
Yes agree. I was thinking the same. We would not need the symbol_rate in
the struct.

> Sample principle.
> 
> So _really_ thinking about this I suggest
> 
> - Following the DPHY example
> - Including all of the CPHY specific timings
>   The ones you posted, plus the few I found missing
>   Any other relevant CPHY timings we may have missed
> - Include the helper functions in drivers/phy/phy-core-mipi-cphy.c
>   IMO we should use defines not hard-coded constants for the
>   specification of the timings here, unlike the DPHY code
> 
These comments will be addressed in the next version.

> ---
> bod


  reply	other threads:[~2026-10-23 23:20 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-17  4:17 [PATCH 0/3] phy: core, qcom-mipi-csi2: add generic MIPI C-PHY support Anusha Arun Nandi
2026-10-17  4:17 ` [PATCH 1/3] phy: core: add generic MIPI C-PHY configuration API Anusha Arun Nandi
2026-10-17 23:00   ` Bryan O'Donoghue
2026-10-19 10:24     ` Bryan O'Donoghue
2026-10-19 11:24       ` Bryan O'Donoghue
2026-10-19 14:15         ` Loic Poulain
2026-10-23  0:39           ` Anusha Arun Nandi
2026-10-23  1:06         ` Anusha Arun Nandi
2026-10-23  0:33     ` Anusha Arun Nandi
2026-10-23  2:15       ` Bryan O'Donoghue
2026-10-23 23:20         ` Anusha Arun Nandi [this message]
2026-10-17  4:17 ` [PATCH 2/3] phy: qcom-mipi-csi2: Add sa8775p C-PHY support Anusha Arun Nandi
2026-10-17 23:19   ` Bryan O'Donoghue
2026-10-23 23:46     ` Anusha Arun Nandi
2026-10-17  4:17 ` [PATCH 3/3] phy: qcom-mipi-csi2: Add sc7280 " Anusha Arun Nandi

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