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* [PATCH] arm64: dts: socfpga: agilex5: update data-width for dmac
@ 2026-05-06  6:21 Adrian Ng Ho Yin
  2026-05-06 11:37 ` Dinh Nguyen
  0 siblings, 1 reply; 2+ messages in thread
From: Adrian Ng Ho Yin @ 2026-05-06  6:21 UTC (permalink / raw)
  To: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	devicetree, linux-kernel
  Cc: Adrian Ng Ho Yin

Update data-width property for dmac to 3 which is 64 bits to match value
configured in the hardware register.

Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 02e62d954e94..b06c6d5d60ee 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -343,7 +343,7 @@ dmac0: dma-controller@0 {
 				#dma-cells = <1>;
 				dma-channels = <4>;
 				snps,dma-masters = <1>;
-				snps,data-width = <2>;
+				snps,data-width = <3>;
 				snps,block-size = <32767 32767 32767 32767>;
 				snps,priority = <0 1 2 3>;
 				snps,axi-max-burst-len = <8>;
@@ -362,7 +362,7 @@ dmac1: dma-controller@10000 {
 				#dma-cells = <1>;
 				dma-channels = <4>;
 				snps,dma-masters = <1>;
-				snps,data-width = <2>;
+				snps,data-width = <3>;
 				snps,block-size = <32767 32767 32767 32767>;
 				snps,priority = <0 1 2 3>;
 				snps,axi-max-burst-len = <8>;
-- 
2.49.GIT


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] arm64: dts: socfpga: agilex5: update data-width for dmac
  2026-05-06  6:21 [PATCH] arm64: dts: socfpga: agilex5: update data-width for dmac Adrian Ng Ho Yin
@ 2026-05-06 11:37 ` Dinh Nguyen
  0 siblings, 0 replies; 2+ messages in thread
From: Dinh Nguyen @ 2026-05-06 11:37 UTC (permalink / raw)
  To: Adrian Ng Ho Yin, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	devicetree, linux-kernel



On 5/6/26 01:21, Adrian Ng Ho Yin wrote:
> Update data-width property for dmac to 3 which is 64 bits to match value
> configured in the hardware register.
> 
> Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
> ---
>   arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 02e62d954e94..b06c6d5d60ee 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -343,7 +343,7 @@ dmac0: dma-controller@0 {
>   				#dma-cells = <1>;
>   				dma-channels = <4>;
>   				snps,dma-masters = <1>;
> -				snps,data-width = <2>;
> +				snps,data-width = <3>;
>   				snps,block-size = <32767 32767 32767 32767>;
>   				snps,priority = <0 1 2 3>;
>   				snps,axi-max-burst-len = <8>;
> @@ -362,7 +362,7 @@ dmac1: dma-controller@10000 {
>   				#dma-cells = <1>;
>   				dma-channels = <4>;
>   				snps,dma-masters = <1>;
> -				snps,data-width = <2>;
> +				snps,data-width = <3>;
>   				snps,block-size = <32767 32767 32767 32767>;
>   				snps,priority = <0 1 2 3>;
>   				snps,axi-max-burst-len = <8>;

Applied!

Thanks,
Dinh


^ permalink raw reply	[flat|nested] 2+ messages in thread

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